MC10H135

MC10H135 Dual J‐K Master‐Slave Flip‐Flop Description The MC10H135 is a dual J-K master-slave flip-flop. The device is provided with an asynchronous set(s) and reset(R). These set and reset inputs overide the clock. A common clock is provided with separate J-K inputs. When the clock is static, the JK inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock. Features Propagation delay, 1.5 ns Typical Power Dissipation, 280 mW Typical/Pkg. (No Load) ftog 250 MHz Max Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) Voltage Compensated MECL 10K™ Compatible These Devices are Pb-Free, Halogen Free and are RoHS Compliant www.onsemi.com 16 1 PDIP−16 P SUFFIX CASE 648−08 20 1 PLLC−20 FN SUFFIX CASE 775−02 MARKING DIAGRAMS* 16 MC10H135P AWLYYWWG 1 1 20 10H135G AWLYYWW PDIP−16 PLLC−20 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G =...