M29F100BB

M29F100BT M29F100BB 1 Mbit (128Kb x8 or 64Kb x16, Boot Block) Single Supply Flash Memory PRELIMINARY DATA s SINGLE 5V±10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 45ns PROGRAMMING TIME – 8µs per Byte/Word typical 5 MEMORY BLOCKS – 1 Boot Block (Top or Bottom Location) – 2 Parameter and 2 Main Blocks 1 44 s s s s PROGRAM/ERASE CONTROLLER – Embedded Byte/Word Program algorithm – Embedded Multi-Block/Chip Erase algorithm – Status Register Polling and Toggle Bits – Ready/Busy Output Pin TSOP48 (N) 12 x 20mm SO44 (M) s ERASE SUSPEND and RESUME MODES – Read and Program another Block during Erase Suspend Figure 1. Logic Diagram s UNLOCK BYPASS PROGRAM COMMAND – Faster Production/Batch Programming TEMPORARY BLOCK UNPROTECTION MODE LOW POWER CONSUMPTION – Standby and Automatic Standby 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION – Defectivity below 1 ppm/year ELECTRONIC SIGNATURE – Manufacturer Code: 0020h – M29F100BT Device Code: 00D0h – M29F100BB Device Code: 00D1h A0-A15 W E G RP VCC s 16 15 DQ0-DQ14 DQ15A–1 M29F100BT M29F100BB BYTE RB s s s s VSS AI02916 July 1999 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/21 M29F100BT, M29F100BB Figure 2A. TSOP Connections A15 A14 A13 A12 A11 A10 A9 A8 NC NC W RP NC NC RB NC NC A7 A6 A5 A4 A3 A2 A1 1 48 NC BYTE VSS DQ15A–1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1...