M29W200BB

M29W200BT M29W200BB 2 Mbit (256Kb x8 or 128Kb x16, Boot Block) Low Voltage Single Supply Flash Memory PRELIMINARY DATA s SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 55ns PROGRAMMING TIME – 10µs per Byte/Word typical 7 MEMORY BLOCKS – 1 Boot Block (Top or Bottom Location) – 2 Parameter and 4 Main Blocks 1 44 s s s s PROGRAM/ERASE CONTROLLER – Embedded Byte/Word Program algorithm – Embedded Multi-Block/Chip Erase algorithm – Status Register Polling and Toggle Bits – Ready/Busy Output Pin TSOP48 (N) 12 x 20mm SO44 (M) s ERASE SUSPEND and RESUME MODES – Read and Program another Block during Erase Suspend Figure 1. Logic Diagram s UNLOCK BYPASS PROGRAM COMMAND – Faster Production/Batch Programming TEMPORARY BLOCK UNPROTECTION MODE LOW POWER CONSUMPTION – Standby and Automatic Standby 17 A0-A16 W E G RP M29W200BT M29W200BB 15 DQ0-DQ14 DQ15A–1 BYTE RB s VCC s s 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION – Defectivity below 1 ppm/year ELECTRONIC SIGNATURE – Manufacturer Code: 0020h – Top Device Code M29W200BT: 0051h – Bottom Device Code: M29W200BB 0057h s s VSS AI02948 March 2000 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/22 M29W200BT, M29W200BB Figure 2. TSOP Connections A15 A14 A13 A12 A11 A10 A9 A8 NC NC W RP NC NC RB NC NC A7 A6 A5 A4 A3 A2 A1 1 48 A16 BYTE VSS DQ15A–1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 ...