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M5M465805BTP-5S Dataheets PDF



Part Number M5M465805BTP-5S
Manufacturers Mitsubishi
Logo Mitsubishi
Description EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM
Datasheet M5M465805BTP-5S DatasheetM5M465805BTP-5S Datasheet (PDF)

(Rev. 1.1) MITSUBISHI LSIs M5M467405/465405BJ,BTP -5,-6,-5S,-6S M5M467805/465805BJ,BTP -5,-6,-5S,-6S M5M465165BJ,BTP -5,-6,-5S,-6S EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM DESCRIPTION The M5M467405/465405BJ,BTP is organized 16777216-word by 4-bit, M5M467805/465805BJ,BTP is organized 8388608-word by 8-bit, and M5M465165BJ,BTP is organized 4194304-word by 16-bit .

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(Rev. 1.1) MITSUBISHI LSIs M5M467405/465405BJ,BTP -5,-6,-5S,-6S M5M467805/465805BJ,BTP -5,-6,-5S,-6S M5M465165BJ,BTP -5,-6,-5S,-6S EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM DESCRIPTION The M5M467405/465405BJ,BTP is organized 16777216-word by 4-bit, M5M467805/465805BJ,BTP is organized 8388608-word by 8-bit, and M5M465165BJ,BTP is organized 4194304-word by 16-bit dynamic RAMs, fabricated with the high performance CMOS process, and are suitable for large-capacity memory systems with high speed and low power dissipation. The use of double-layer aluminum process combined with CMOS technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density. Multiplexed address inputs permit both a reduction in pins and an increase in system densities. FEATURES Type name M5M467405BXX-5,5S M5M467805BXX-5,5S M5M467405BXX-6,6S M5M467805BXX-6,6S M5M465405BXX-5,5S M5M465805BXX-5,5S M5M465405BXX-6,6S M5M465805BXX-6,6S Address Power RAS OE CAS Cycle access access access access dissipatime tion time time time time (max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW) Type name Power Address RAS CAS OE Cycle dissipaaccess access access access time time tion time time time (max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW) 50 60 50 60 13 15 13 15 25 30 25 30 13 15 13 15 84 104 84 104 300 250 390 325 M5M465165BXX-5,5S M5M465165BXX-6,6S 50 60 13 15 25 30 13 15 84 104 420 390 XX=J,TP Standard 32 pin SOJ, 32 pin TSOP (M5M467405Bxx/M5M465405Bxx/M5M467805Bxx/M5M465805Bxx) Standard 50 pin SOJ, 50 pin TSOP (M5M465165Bxx) Single 3.3 ± 0.3V supply Low stand-by power dissipation 1.8mW (Max) LVCMOS input level Low operating power dissipation M5M467405Bxx-5,5S / M5M467805Bxx-5,5S 360.0mW (Max) M5M467405Bxx-6,6S / M5M467805Bxx-6,6S 324.0mW (Max) M5M465405Bxx-5,5S / M5M465805Bxx-5,5S 468.0mW (Max) M5M465405Bxx-6,6S / M5M465805Bxx-6,6S 432.0mW (Max) M5M465165Bxx-5,5S 504.0mW (Max) M5M465165Bxx-6,6S 468.0mW (Max) Self refresh capability* Self refresh current 400µA (Max) EDO mode , Read-modify-write, CAS before RAS refresh, Hidden refresh capabilities Early-write mode , OE and W to control output buffer impedance All inputs, outputs LVTTL compatible and low capacitance * :Applicable to self refresh version(M5M467405/465405/467805/465805/465165BJ,BTP-5S,-6S:option) only ADDRESS Part No. Row Add Col Add Refresh Refresh Cycle Normal S-version RAS Only Ref,Normal R/W 8192/64ms 8192/128ms M5M467405Bxx A0-A12 A0-A10 CBR Ref,Hidden Ref 4096/64ms 4096/128ms Only Ref,Normal R/W 4096/64ms 4096/128ms M5M465405Bxx A0-A11 A0-A11 RAS CBR Ref,Hidden Ref RAS Only Ref,Normal R/W 8192/64ms 8192/128ms M5M467805Bxx A0-A12 A0-A9 CBR Ref,Hidden Ref 4096/64ms 4096/128ms Only Ref,Normal R/W 4096/64ms 4096/128ms M5M465805Bxx A0-A11 A0-A10 RAS CBR Ref,Hidden Ref M5M465165Bxx A0-A11 A0-A9 RAS Only Ref,Normal R/W 4096.


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