Document
99Jul Jul ,1997 ,1997
M5M51016BTP,RT-10VL-I, -10VLL-I
1048576-BIT(65536-WORD 1048576-BIT(65536-WORD BY BY 16-BIT)CMOS 16-BIT)CMOS STATIC STATIC RAM RAM
DESCRIPTION
The M5M51016BTP, RT are a 1048576-bit CMOS static RAM organized as 65536 word by 16-bit which are fabricated using high-performance triple polysilicon CMOS technology. The use of resistive load NMOS cells and CMOS periphery result in a high density and low power static RAM. They are low stand-by current and low operation current and ideal for the battery back-up application. The M5M51016BTP,RT are packaged in a 44-pin thin small outline package which is a high reliability and high density surface mount device (SMD). Two types of devices are available. M5M51016BTP(normal lead bend type package), M5M51016BRT (reverse lead bend type package). Using both types of devices, it becomes very easy to design a printed circuit board.
MITSUBISHI LSIs
PIN CONFIGURATION (TOP VIEW)
NC A12 A7 A6 A5 A4 A3 A2 A1 A0
CHIP SELECT INPUT CS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
NC BC1 BC2 A14 A15
BYTE CONTROL INPUTS ADDRESS INPUTS
ADDRESS INPUTS
FEATURES
Power supply current Type name
Access time (max)
Active (max)
stand-by (max) 120µA (VCC = 3.6V)
M5M51016BTP,RT-10VL
100ns 12mA (1MHz)
M5M51016BTP,RT-10VLL
100ns
24µA (VCC = 3.6V) 0.3µA (VCC = 3.0V, typ)
Single +3.3V power supply Low stand-by current 0.3µA (typ.) Directly TTL compatible : All inputs and outputs Easy memory expansion and power down by CS, BC1 & BC2 Data hold on +2V power supply Three-state outputs : OR-tie capability OE prevents data contention in the I/O bus Common data I/O Package M5M51016BTP,RT .............................. 44pin 400mil TSOP(II)
(0V)GND OUTPUT ENABLE INPUT OE NC DQ1 DQ2 DQ3 DATA DQ4 INPUTS/ OUTPUTS DQ5 DQ6 DQ7 DQ8
A13 WRITE CONTROL W INPUTS A8 A9 ADDRESS INPUTS A11 A10 GND(0V) NC DQ16 DQ15 DQ14 DQ13 DATA INPUTS/ DQ12 OUTPUTS DQ11 DQ10 DQ9 VCC(5V)
Outline 44P3W - H (400mil TSOP Normal Bend)
M5M51016BTP
APPLICATION
Small capacity memory units
NC BC1 BC2 A14 ADDRESS INPUTS A15 A13 WRITE CONTROL W INPUTS A8 ADDRESS A9 INPUTS A11 A10 (0V)GND NC DQ16 DQ15 DQ14
BYTE CONTROL INPUTS DATA INPUTS/ OUTPUTS
44 43 42 41 40 39 38 37
1 2 3 4 5 6 7 8
36 35 34 33 32 31 30 29 28 27 26 25 24 23
9 10 11 12 13 14 15 16 17 18 19 20 21 22
DQ13 DQ12 DQ11 DQ10 DQ9
(5V)VCC
NC A12 A7 A6 A5 ADDRESS A4 INPUTS A3 A2 A1 A0 SELECT CS CHIP INPUT GND(0V) OUTPUT ENABLE OE INPUT NC DQ1 DQ2 DQ3 DQ4 DATA INPUTS/ DQ5 OUTPUTS DQ6 DQ7 DQ8
Outline 44P3W - J (400mil TSOP Reverse Bend)
NC : NO CONNECTION
M5M51016BRT
MITSUBISHI ELECTRIC
1
9 Jul ,1997
M5M51016BTP,RT-10VL-I, -10VLL-I
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
FUNCTION
The operation mode of the M5M51016B series are determined by a combination of the device control inputs BC1, BC 2, CS, W and OE. Each mode is summarized in the function table. A write cycle is executed whenever the .