M5M5V4R04J-15

MITSUBISHI LSIs M5M5V4R04J-12,-15 1997.11.20 Rev.F 4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM DESCRIPTION The M5M5V4R04J is a family of 1048576-word by 4-bit static RAMs, fabricated with the high performance CMOS silicon gate process and designed for high speed application. The M5M5V4R04J is offered in a 32-pin plastic small outline Jlead package(SOJ). These device operate on a single 3.3V supply, and are directly TTL compatible. They include a power down feature as well. PIN CONFIGURATION (TOP VIEW) FEATURES M5M5V4R04J-12 12ns(max) M5M5V4R04J-15 15ns(max) Low power dissipation Active 297mW(typ) Stand by 3.3mW(typ) Single +3.3V power supply Fully static operation : No clocks, No refresh Common data I/O Easy memory expansion by S Three-state outputs : OR-tie capability OE prevents data contention in the I/O bus Directly TTL compatible : All inputs and outputs Fast access time A0 A1 address A2 inputs A3 A4 chip select S input data inputs/ DQ 1 outputs(3.3V) VCC (0V) GND data inputs/ DQ2 outputs write control W input A5 A6 address A7 inputs A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A19 A18 address A17 inputs A16 A15 output enable OE input DQ4 data inputs/ GND (0V) outputs VCC (3.3V) DQ3 data inputs/ outputs A14 A13 address A12 inputs A11 A10 NC M5M5V4R04J Outline 32P0K(SOJ) APPLICATION High-speed memory units BLOCK DIAGRAM A0 A1 A2 address inputs PACKAGE 32pin 4...