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M62334P Dataheets PDF



Part Number M62334P
Manufacturers Mitsubishi
Logo Mitsubishi
Description 8-BIT 4CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
Datasheet M62334P DatasheetM62334P Datasheet (PDF)

MITSUBISHI M62334P/FP M62339P/FP 8-BIT 4CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS DESCRIPTION The M62334/M62339 is an integrated circuit semiconductor of CMOS structure with 4 channels of built in D-A converters with output buffer operational amplifiers. The input is 2-wires serial method is used for the transfer format of digital data to allow connection with a microcomputer with minimum wiring. The output buffer operational amplifier employs AB class output circuit wit.

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MITSUBISHI M62334P/FP M62339P/FP 8-BIT 4CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS DESCRIPTION The M62334/M62339 is an integrated circuit semiconductor of CMOS structure with 4 channels of built in D-A converters with output buffer operational amplifiers. The input is 2-wires serial method is used for the transfer format of digital data to allow connection with a microcomputer with minimum wiring. The output buffer operational amplifier employs AB class output circuit with sync and source drive capacity of 1.0mA or more,and it operates in the whole voltage range from Vcc to ground. The M62333 and the M62338 differ only in their slave address. PIN CONFIGURATION(TOP VIEW) Ao1 1 8 Vcc M62334 M62339 Ao2 2 Ao3 3 Ao4 4 7 SCL 6 SDA 5 GND Outline 8P4 (P) 8P2S-A (FP) FEATURES • Digital data transfer format I C BUS serial data method • Output buffer operational amplifier it operates in the whole voltage range from Vcc to ground. • High output current drive capacity ±1.0mA over 2 APPLICATION Conversion from digital data to analog control data for home-use and industrial equipment. Signal gain control or automatic adjustment of DISPLAYMONITOR or CTV. BLOCK DIAGRAM Vcc 8 SCL 7 SDA 6 GND 5 POWER ON RESET I2C BUS TRANSCEIVER 8 CHANNEL DECODER 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R 1 2 3 4 Ao1 Ao2 Ao3 Ao4 MITSUBISHI ELECTRIC 980714 rev.E ( 1 / 6 ) MITSUBISHI M62334P/FP M62339P/FP 8-BIT 4CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS EXPLANATION OF TERMINALS Pin No. 6 7 1 2 3 4 8 5 Symbol SDA SCL Ao1 Ao2 Ao3 Ao4 Vcc GND Power supply terminal GND terminal Serial data input terminal Serial clock input terminal Function 8-bit resolution D-A converter output terminal ABSOLUTE MAXIMUM RATING Symbol Vcc Vin Vo Pd Topr Tstg Parameter Supply voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature Conditions Ratings –0.3 to 7.0 –0.3 to Vcc+0.3 –0.3 to Vcc+0.3 417 (DIP) / 272 (FP) –20 to 85 –55 to 125 Unit V V V mW °C °C ELECTRICAL CHARACTERISTICS (Vcc=+5V±10%,GND=0V,Ta=–20 to 85°C unless otherwise noted) Ratings Symbol Vcc Icc IILK VIL VIH VAO IAO SDL SL Parameter Suplly voltage Supply current Input leak current Input low voltage Input high voltage Buffer amplifier output voltage range Buffer amplifier output drive range Differential nonlinearity Nonlinearity VCC=5.12V(20mV/LSB) without load (I AO=0) IAO=±100µA IAO=±500µA Upper side saturation voltage=0.3V Lower side saturation voltage=0.2V CLK=500kHz Operation, IAO=0µA Data : 6Ah (at maximum current ) SDA=SCL=GND,IAO=0µA Test conditions MIN 2.7 0 0 –10 0 0.8VCC 0.1 0.2 –1.0 –1.0 –1.5 –2.0 –2.0 TYP 5.0 1.4 0.9 MAX 5.5 3.0 2.0 10 0.2VCC VCC VCC-0.1 VCC-0.2 1.0 1.0 1.5 2.0 2.0 0.1 Unit V mA mA µA V V V V mA LSB LSB LSB LSB µF Ω 980714 rev.E ( 2 / 6 ) VIN=0 to Vcc SZERO Zero code error SFULL Co Ro Full scale error Output capacitative load Buffer amplifier output inpedance 5.0 MITSUBISHI ELECTRIC MITSUBISHI M62334P/FP M62339P/FP 8-BIT 4CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS I2C BUS LINE CHARACTERISTICS Symbol fSCL tBU F tHD :STA tLOW tHIGH tSU:STA tHD :DAT tSU:D AT tR tF tSU:STO Parameter SCL clock frequency Time the bus must be free before a new transmission can start Hold time START Condition. After this period,the first clock pulse is generated. LOW period of the clock HIGh period of the clock Set-up time for START condition (Only relevant for a repeated START condition) Hold time DATA Set-up time DATA Rise time of both SDA and SCL lines Fall time of both SDA and SCL lines Set-up time for STOP condition Min. 0 4.7 4.0 4.7 4.0 4.7 0 250 4.0 Max. 100 1000 300 - units KHz µs µs µs µs µs µs ns ns ns µs • Note that a transmitter must internally provide at least a hold time to bridge the undefined region (max.300 ns) of the falling edge of SCL. TIMING CHART tR, tF tBUF V IH SDA V IL tHD:STA V IH SCL tSU:DAT tHD:DAT tSU:STA tSU:STO V IL tLOW START tHIGH START STOP START MITSUBISHI ELECTRIC 980714 rev.E ( 3 / 6 ) MITSUBISHI M62334P/FP M62339P/FP 8-BIT 4CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS I2C BUS FORMAT STA SLAVE ADDRESS W A STA: start condition W: write(SDA=Low) SUB ADDRESS A DAC DATA A STP A: affirmation bit STP: stop condition • SLAVE ADDRESS M62334 First Last M62339 First Last 1 0 0 1 1 0 0 1 0 0 1 1 1 1 • SUB ADDRESSS First Last CHANNEL SELECT DATA X X X X X X S1 S0 S1 0 0 1 1 S0 0 1 0 1 Channel selection Don't care CHANNEL SELECT DATA ch1 selection ch2 selection ch3 selection ch4 selection • DAC DATA First MSB Last LSB D7 First MSB D6 D5 D4 D3 D2 D1 D0 Last LSB D7 0 0 0 0 : 1 1 D6 0 0 0 0 : 1 1 D5 0 0 0 0 : 1 1 D4 0 0 0 0 : 1 1 D3 0 0 0 0 : 1 1 D2 0 0 0 0 : 1 1 D1 0 0 1 1 : 1 1 D0 0 1 0 1 : 0 1 DAC output Vcc/256 Vcc/256 Vcc/256.


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