MITSUBISHI (Dig./Ana. INTERFACE)
M62500P/FP
SYNCHRONIZATION DEFLECTION SYSTEM CONTROL PWM IC
DESCRIPTION
The M62500 is...
MITSUBISHI (Dig./Ana. INTERFACE)
M62500P/FP
SYNCHRONIZATION DEFLECTION SYSTEM CONTROL PWM IC
DESCRIPTION
The M62500 is a semiconductor integrated circuit designed and developed as a deflection control of the CRT display monitor. The built-in trigger mode oscillator allows stable PWM control to be gained against a wide range of change of external signals. The M62500 provides a low supply voltage output malfunction preventive circuit (UVLO) and software start function optimum to horizontal output correction of monitor, high voltage drive and high voltage
regulator.
PIN CONFIGURATION (TOP VIEW)
GND 1 VREF 2 Tin 3 Delay Adj 4 CAGC1 5 24 VCC 23 DRIVE OUTPUT 22 Phase Adj 21 Duty Adj 20 DOUBLE SPEED SWITCH 19 RAGC 18 CAGC2 17 IN2 (+) 16 IN2 (-) 15 FB2 14 COLLECTOR2 13 OUT2
DTC 6 IN1 (+) 7
FEATURES
PWM output in synchronization with external signals Wide range of PWM control frequency 15kHz to 150kHz The PWM output phase is adjustable against external signals Soft start Built-in low voltage output malfunction prevention circuit Start VCC>9V Stop VCC<6V
IN1 (-) 8 FB1 9 COLLECTOR1 10 OUT1 11 P.GND 12
Outline 24P4D (P) 24P2V-A (FP)
APPLICATION
CRT display monitor
BLOCK DIAGRAM
VCC 24 DRIVE OUTPUT 23 Phase Adj 22 Duty Adj 21 DOUBLE SPEED SWITCH 20 RAGC 19 CAGC2 18 IN2 (+) 17 IN2 (-) 16 FB2 COLLECTOR2 OUT2 15 14 13
PHASE CONT
EDGE DETECTION (SWITCH)
GEN AGC
WIND COMP
DUTY CONT
comp
GEN VREF DELAY AGC
OUTPUT START START (VCC>9V) STOP (VCC<6V) VCC
1 GND
2 VREF
3 Tin
4 De...