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IDT23S05 Dataheets PDF



Part Number IDT23S05
Manufacturers Integrated Device
Logo Integrated Device
Description 3.3V ZERO DELAY CLOCK BUFFER
Datasheet IDT23S05 DatasheetIDT23S05 Datasheet (PDF)

IDT23S05 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE FEATURES: • • • • • • • • • • • • • Phase-Lock Loop Clock Distribution 10MHz to 133MHz operating frequency Distributes one clock input to one bank of five outputs Zero Input-Output Delay Output Skew < 250ps Low jitter <200 ps cycle-to-cycle IDT23S05-1 for Standard Drive IDT23S05-1H for High Drive No external RC network required Operates at.

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IDT23S05 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE FEATURES: • • • • • • • • • • • • • Phase-Lock Loop Clock Distribution 10MHz to 133MHz operating frequency Distributes one clock input to one bank of five outputs Zero Input-Output Delay Output Skew < 250ps Low jitter <200 ps cycle-to-cycle IDT23S05-1 for Standard Drive IDT23S05-1H for High Drive No external RC network required Operates at 3.3V VDD Power down mode Spread spectrum compatible Available in SOIC package IDT23S05 DESCRIPTION: The IDT23S05 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT23S05 is an 8-pin version of the IDT23S09. IDT23S05 accepts one reference input, and drives out five low skew clocks. The -1H version of this device operates up to 133MHz frequency and has a higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT23S05 enters power down. In this mode, the device will draw less than 12µA for Commercial Temperature range and less than 25µA for Industrial temperature range, the outputs are tri-stated, and the PLL is not running, resulting in a significant reduction of power. The IDT23S05 is characterized for both Industrial and Commercial operation. FUNCTIONAL BLOCK DIAGRAM 8 CLKOUT REF 1 PLL Control Logic 3 CLK1 2 CLK2 5 7 CLK3 CLK4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 c 2003 Integrated Device Technology, Inc. OCTOBER 2003 DSC 6381/6 IDT23S05 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS(1) Symbol VDD Rating Supply Voltage Range Input Voltage Range (REF) Input Voltage Range (except REF) IIK (VI < 0) IO (VO = 0 to VDD) VDD or GND TA = 55°C (in still air)(3) TSTG Operating Temperature Operating Temperature Input Clamp Current Continuous Output Current Continuous Current Maximum Power Dissipation Storage Temperature Range Commercial Temperature Range Industrial Temperature Range -40 to +85 °C Max. –0.5 to +4.6 –0.5 to +5.5 –0.5 to VDD+0.5 –50 ±50 ±100 0.7 –65 to +150 0 to +70 mA mA mA W °C °C Unit V V V VI (2) VI REF CLK2 CLK1 GND 1 2 3 4 8 7 6 5 CLKOUT CLK4 VDD CLK3 SOIC TOP VIEW NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. APPLICATIONS: • • • • • SDRAM Telecom Datacom PC Motherboards/Workstations Critical Path Delay Designs PIN DESCRIPTION Pin Name REF (1) Pin Number 1 2 3 4 5 6 7 Type IN Out Out Ground Out PWR Out Out Output clock Output clock Ground Output clock 3.3V Supply Output clock Functional Description Input reference clock, 5 Volt tolerant input CLK2(2) CLK1 GND CLK3 VDD CLK4 (2) (2) (2) (2) CLKOUT 8 Output clock, internal feedback on this pin NOTES: 1. Weak pull down. 2. Weak pull down on all outputs. 2 IDT23S05 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES OPERATING CONDITIONS - COMMERCIAL Symbol VDD TA CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance < 100MHz Load Capacitance 100MHz - 133MHz Input Capacitance Parameter Min. 3 0 — — — Max. 3.6 70 30 10 7 pF Unit V °C pF DC ELECTRICAL CHARACTERISTICS - COMMERCIAL Symbol VIL VIH IIL IIH VOL VOH IDD_PD IDD Parameter Input LOW Voltage Level Input HIGH Voltage Level Input LOW Current Input HIGH Current Output LOW Voltage Output HIGH Voltage Power Down Current Supply Current VIN = 0V VIN = VDD Standard Drive High Drive Standard Drive High Drive REF = 0MHz Unloaded Outputs at 66.66MHz IOL = 8mA IOL = 12mA (-1H) IOH = -8mA IOH = -12mA (-1H) — — 12 32 µA mA 2.4 — V Conditions Min. — 2 — — — Max. 0.8 — 50 100 0.4 Unit V V µA µA V SWITCHING CHARACTERISTICS (23S05-1) - COMMERCIAL Symbol t1 Parameter Output Frequency Duty Cycle = t2 ÷ t1 t3 t4 t5 t6 t7 tJ tLOCK Rise Time Fall Time Output to Output Skew Delay, REF Rising Edge to CLKOUT Rising Edge Device-to-Device Skew Cycle-to-Cycle Jitter, pk - pk PLL Lock Time 10pF Load .


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