Document
PHP/PHB/PHD96NQ03LT
N-channel enhancement mode field-effect transistor
Rev. 03 — 23 October 2001 Product data
1. Description
N-channel logic level field-effect power transistor in a plastic package using TrenchMOS™1 technology. Product availability: PHP96NQ03LT in SOT78 (TO-220AB) PHB96NQ03LT in SOT404 (D2-PAK) PHD96NQ03LT in SOT428 (D-PAK).
2. Features
s Low gate charge s Low on-state resistance.
3. Applications
s Optimized as a control FET in DC to DC converters.
4. Pinning information
Table 1: Pinning - SOT78, SOT404, SOT428 simplified outline and symbol Simplified outline
mb mb mb
Pin Description 1 2 3 mb gate (g)
Symbol
d
drain (d) source (s) mounting base, connected to drain (d)
[1]
g s
MBB076
2 2 1
MBK106
1 3
MBK116
3
MBK091
Top view
1 2 3
SOT78 (TO-220AB)
[1]
SOT404 (D2-PAK)
SOT428 (D-PAK)
It is not possible to make connection to pin 2 of the SOT404 and SOT428 packages.
1.
TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
PHP/PHB/PHD96NQ03LT
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tj = 25 to 175 °C Tmb = 25 °C; VGS = 5 V Tmb = 25 °C Tj = 25° C; VGS = 10 V; ID = 25 A Tj = 25° C; VGS = 5 V; ID = 25 A Typ 4.2 5.6 Max 25 75 115 175 4.95 7.5 Unit V A W °C mΩ mΩ drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS VGSM ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) gate-source voltage drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature source (diode forward) current (DC) Tmb = 25 °C peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs tp ≤ 50 µs; pulsed; duty cycle 25%; Tj ≤ 150 °C Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 Tmb = 100 °C; VGS = 5 V; Figure 2 Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 Conditions Tj = 25 to 175 °C Tj = 25 to 175 °C; RGS = 20 kΩ Min −55 −55 Max 25 25 ±15 ±20 75 65 240 115 +175 +175 75 240 Unit V V V V A A A W °C °C A A
Source-drain diode
9397 750 08963
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 03 — 23 October 2001
2 of 14
Philips Semiconductors
PHP/PHB/PHD96NQ03LT
N-channel enhancement mode field-effect transistor
120 Pder (%) 80
03aa16
03af09
120 Ider (%) 80
40
40
0 0 50 100 150 200 o Tmb ( C)
0 0 50 100 150 200 Tmb (ºC)
P tot P der = ---------------------- × 100 % P °
tot ( 25 C )
ID I der = ------------------ × 100 % I °
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
Fig 2. Normalized continuous drain current as a function of mounting base temperature.
103 ID (A)
03af11
RDSon = V.