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PHD2N60E Dataheets PDF



Part Number PHD2N60E
Manufacturers NXP
Logo NXP
Description Transistor
Datasheet PHD2N60E DatasheetPHD2N60E Datasheet (PDF)

Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated FEATURES • Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Low thermal resistance PHP2N60E, PHB2N60E, PHD2N60E SYMBOL d QUICK REFERENCE DATA VDSS = 600 V g ID = 1.9 A RDS(ON) ≤ 6 Ω s GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and comput.

  PHD2N60E   PHD2N60E


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Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated FEATURES • Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Low thermal resistance PHP2N60E, PHB2N60E, PHD2N60E SYMBOL d QUICK REFERENCE DATA VDSS = 600 V g ID = 1.9 A RDS(ON) ≤ 6 Ω s GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. The PHP2N60E is supplied in the SOT78 (TO220AB) conventional leaded package. The PHB2N60E is supplied in the SOT404 surface mounting package. The PHD2N60E is supplied in the SOT428 surface mounting package. PINNING PIN 1 2 3 tab DESCRIPTION gate drain1 source SOT78 (TO220AB) tab SOT404 tab SOT428 tab 2 2 drain 1 23 1 3 1 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total dissipation Operating junction and storage temperature range CONDITIONS Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 600 600 ± 30 1.9 1.2 7.6 50 150 UNIT V V V A A A W ˚C 1 It is not possible to make connection to pin 2 of the SOT428 or SOT404 packages. August 1998 1 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated AVALANCHE ENERGY LIMITING VALUES PHP2N60E, PHB2N60E, PHD2N60E Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy CONDITIONS MIN. MAX. 144 UNIT mJ Unclamped inductive load, IAS = 1 A; tp = 0.32 ms; Tj prior to avalanche = 25˚C; VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer to fig:17 Repetitive avalanche energy2 IAR = 1.9 A; tp = 1 µs; Tj prior to avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V; refer to fig:18 Repetitive and non-repetitive avalanche current EAR IAS, IAR - 4 1.9 mJ A THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT78 package, in free air SOT404 and SOT428 packages, pcb mounted, minimum footprint TYP. MAX. UNIT 60 50 2.5 K/W K/W K/W 2 pulse width and repetition rate limited by Tj max. August 1998 2 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER Drain-source breakdown voltage ∆V(BR)DSS / Drain-source breakdown ∆Tj voltage temperature coefficient RDS(ON) Drain-source on resistance VGS(TO) Gate threshold voltage Forward transconductance gfs IDSS Drain-source leakage current IGSS Qg(tot) Qgs Qgd td(on) tr td(off) tf Ld Ld Ls Ciss Coss Crss V(BR)DSS CONDITIONS PHP2N60E, PHB2N60E, PHD2N60E MIN. 600 2.0 0.5 - TYP. MAX. UNIT 0.1 4.6 3.0 1.4 1 50 10 20 2 9 10 20 60 20 3.5 4.5 7.5 236 34 20 6 4.0 100 500 200 25 3 15 V %/K Ω V S µA µA nA nC nC nC ns ns ns ns nH nH nH pF pF pF VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA VGS = 10 V; ID = 1 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 1 A VDS = 600 V; VGS = 0 V VDS = 480 V; VGS = 0 V; Tj = 125 ˚C Gate-source leakage current VGS = ±30 V; VDS = 0 V Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance ID = 2 A; VDD = 480 V; VGS = 10 V VDD = 300 V; RD = 150 Ω; RG = 24 Ω Measured from tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Tmb = 25˚C Tmb = 25˚C IS = 2 A; VGS = 0 V IS = 2 A; VGS = 0 V; dI/dt = 100 A/µs MIN. TYP. MAX. UNIT 360 2.4 1.9 7.6 1.2 A A V ns µC August 1998 3 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHP2N60E, PHB2N60E, PHD2N60E 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 10 Zth j-mb / (K/W) D= 0.5 0.2 0.1 0.05 0.1 0.02 0 T 0.01 t 0.1s 10ms P D tp D= tp T 1 0 20 40 60 80 100 Tmb / C 120 140 10us 1ms t/s Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) ID% Normalised Current Derating 4 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T ID,.


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