MACH435-12

FINAL COM’L: -12/15/20, Q-20/25 MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS s 84 Pins in PLCC s 128 Macrocells s 12 ns tPD s 83.3 MHz fCNT s 70 Inputs with pull-up resistors s 64 Outputs s 192 Flip-flops — 128 Macrocell flip-flops — 64 Input flip-flops s Up to 20 product terms per function, with XOR Lattice Semiconductor s Flexible clocking — Four global clock pins with selectable edges — Asynchronous mode available for each macrocell s 8 “PAL33V16” blocks s Input and output switch matrices for high routability s Fixed, predictable, deterministic delays s Pin compatible with MACH130, MACH131, MACH230, and MACH231 GENERAL DESCRIPTION The MACH435 is a member of our high-performance EE CMOS MACH 4 family. This device has approximately twelve times the macrocell capability of the popular PAL22V10, with significant density and functional features that the PAL22V10 does not provide. The MACH435 consists of eight PAL blocks interconnected by a programmable central switch matrix. The central switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently. Routability is further enhanced by an input switch matrix and an output switch matrix. The input switch matrix provides input signals with alternative paths into the central switch matrix; the output switch matrix provides flexibility...