MD56V62160H

E2G1052-17-X1 ¡ Semiconductor MD56V62160/H ¡ Semiconductor This version: Mar. 1998 MD56V62160/H Pr el im in ar y 4-Bank ¥ 1,048,576-Word ¥ 16-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62160/H is a 4-bank ¥ 1,048,576-word ¥ 16-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible. FEATURES Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 4-bank ¥ 1,048,576-word ¥ 16-bit configuration 3.3 V power supply, ± 0.3 V tolerance Input : LVTTL compatible Output : LVTTL compatible Refresh : 4096 cycles/64 ms Programmable data transfer mode – CAS latency (2, 3) – Burst length (2, 4, 8) – Data scramble (sequential, interleave) CBR auto-refresh, Self-refresh capability Package: 54-pin 400 mil plastic TSOP (Type II) (TSOPII54-P-400-0.80-K) (Product : MD56V62160/H-xxTA) xx indicates speed rank. PRODUCT FAMILY Family MD56V62160-10 MD56V62160-12 MD56V62160H-15 Max. Frequency 100 MHz 83 MHz 66 MHz Access Time (Max.) tAC2 9 ns 14 ns 9 ns tAC3 9 ns 10 ns 9 ns 1/28 ¡ Semiconductor PIN CONFIGURATION (TOP VIEW) VCC DQ1 VCCQ DQ2 DQ3 VSSQ DQ4 DQ5 VCCQ DQ6 DQ7 VSSQ DQ8 VCC LDQM WE CAS RAS CS A13/BA0 A12/BA1 A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 MD56V62160/H   10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 VSS 53 DQ16 52 VSSQ 51 DQ15 50 DQ14 49 VCCQ 48 DQ13 47 DQ12 46 VSSQ 45 DQ11 44 DQ10 43 VCCQ 42 DQ9 41 VSS 40 NC 39 UDQM 38 CLK 3...