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MD82C37A-12 Dataheets PDF



Part Number MD82C37A-12
Manufacturers Intersil
Logo Intersil
Description CMOS High Performance Programmable DMA Controller
Datasheet MD82C37A-12 DatasheetMD82C37A-12 Datasheet (PDF)

82C37A March 1997 CMOS High Performance Programmable DMA Controller Description The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin compatible with NMOS designs, the 82C37A offers increased functionality, improved performance, and dramatically reduced power consumption. The fully static design permits gated clock operation for even further reduction of power. The 82C37A controller.

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82C37A March 1997 CMOS High Performance Programmable DMA Controller Description The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Intersil’s advanced 2 micron CMOS process. Pin compatible with NMOS designs, the 82C37A offers increased functionality, improved performance, and dramatically reduced power consumption. The fully static design permits gated clock operation for even further reduction of power. The 82C37A controller can improve system performance by allowing external devices to transfer data directly to or from system memory. Memory-to-memory transfer capability is also provided, along with a memory block initialization feature. DMA requests may be generated by either hardware or software, and each channel is independently programmable with a variety of features for flexible operation. The 82C37A is designed to be used with an external address latch, such as the 82C82, to demultiplex the most significant 8-bits of address. The 82C37A can be used with industry standard microprocessors such as 80C286, 80286, 80C86, 80C88, 8086, 8088, 8085, Z80, NSC800, 80186 and others. Multimode programmability allows the user to select from three basic types of DMA services, and reconfiguration under program control is possible even with the clock to the controller stopped. Each channel has a full 64K address and word count range, and may be programmed to autoinitialize these registers following DMA termination (end of process). Features • Compatible with the NMOS 8237A • Four Independent Maskable Channels with Autoinitialization Capability • Cascadable to any Number of Channels • High Speed Data Transfers: - Up to 4MBytes/sec with 8MHz Clock - Up to 6.25MBytes/sec with 12.5MHz Clock • Memory-to-Memory Transfers • Static CMOS Design Permits Low Power Operation - ICCSB = 10µA Maximum - ICCOP = 2mA/MHz Maximum • Fully TTL/CMOS Compatible • Internal Registers may be Read from Software Ordering Information PART NUMBER 5MHz CP82C37A-5 IP82C37A-5 CS82C37A-5 IS82C37A-5 CD82C37A-5 ID82C37A-5 MD82C37A-5/B 5962-9054301MQA MR82C37A-5/B 5962-9054301MXA 8MHz CP82C37A IP82C37A CS82C37A IS82C37A CD82C37A ID82C37A MD82C37A/B 5962-9054302MQA MR82C37A/B 5962-9054302MXA 12.5MHz CP82C37A-12 IP82C37A-12 CS82C37A-12 IS82C37A-12 CD82C37A-12 ID82C37A-12 MD82C37A-12/B 5962-9054303MQA MR82C37A-12/B 5962-9054303MXA SMD# 44 Pad CLCC SMD# -55oC to +125oC 40 Ld CERDIP 44 Ld PLCC PACKAGE 40 Ld PDIP TEMPERATURE RANGE 0oC to +70oC -40oC to +85oC 0oC to +70oC -40oC to +85oC 0oC to +70oC -40oC to +85oC -55oC to +125oC PKG. NO. E40.6 E40.6 N44.65 N44.65 F40.6 F40.6 F40.6 F40.6 J44.A J44.A CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 File Number 2967.1 4-192 82C37A Pinouts 82C37A (PDIP/CERDIP) TOP VIEW READY 82C37A (CLCC/PLCC) TOP VIEW MEMW MEMR EOP 39 A3 38 A2 37 A1 36 A0 35 VCC.


MD82C37A MD82C37A-12 MD82C37A-12B


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