74LVC240A

74LVC240A Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state Rev. 8 — 29 November 2011 Product data sheet 1. General description The 74LVC240A is an octal inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V or 5 V applications. The 74LVC240A is functionally identical to the 74LVC244A except that the 244 has non-inverting outputs. 2. Features and benefits  5 V tolerant inputs for interlacing with 5 V logic  Supply voltage range from 1.2 V to 3.6 V  CMOS low power consumption  Direct interface with TTL levels  High-impedance when VCC = 0 V  Complies with JEDEC standard:  JESD8-7A (1.65 V to 1.95 V)  JESD8-5A (2.3 V to 2.7 V)  JESD8-C/JESD36 (2.7 V to 3.6 V)  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115B exceeds 200 V  CDM JESD22-C101E exceeds 1000 V  Specified from 40 C to +85 C and 40 C to +125 C NXP Semiconductors 74LVC240A Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state 3. Ordering information Table 1. Ordering information Type number P...