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INTEGRATED CIRCUITS
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74LVC32245A; 74LVCH32245A 32-bit bus transceiver with direction pin; 5 V tolerant; 3-state
Product specification File under Integrated Circuits, IC24 1999 Sep 01
Philips Semiconductors
Product specification
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state
FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range of 1.2 to 3.6 V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTE™ flow-trough standard pin-out architecture • Low inductance multiple power and ground pins for minimum noise and ground bounce • Direct interface with TTL levels • Bus hold on data inputs (74LVCH32245A only) • Typical output ground bounce voltage: VOLP < 0.8 V at VCC = 3.3 V; Tamb = 25 °C • Typical output VOH undershoot voltage: VOHV > 2 V at VCC = 3.3 V; Tamb = 25 °C • Power-off disabled outputs, permitting live insertion • Plastic fine-pitch ball grid array package. DESCRIPTION
74LVC32245A; 74LVCH32245A
The 74LVC(H)32245A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices in a mixed 3.3 and 5 V environment. The 74LVC(H)32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74LVC(H)32245A features two output enable (nOE) inputs for easy cascading and two send or receive (nDIR) inputs for direction control. nOE controls the outputs so that the buses are effectively isolated. To ensure the high-impedance state during power-up or power-down, input nOE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The 74LVCH32245A bus hold data inputs eliminates the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level (see Fig.2).
QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL tPHL/tPLH CI CI/O CPD Note 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; Σ(CL × VCC2 × fo) = sum of the outputs. PARAMETER propagation delay nAn to nBn; nBn to nAn input capacitance input/output capacitance power dissipation capacitance per buffer VI = GND to VCC; note 1 CONDITIONS CL = 50 pF; VCC = 3.3 V 3.0 5.0 10 30 TYPICAL ns pF pF pF UNIT
1999 Sep 01
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Philips Semiconductors
Product specification
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state
FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGES TYPE NUMBER TEMPERATURE RANGE 74LVC32245AEC 74LVCH32245AEC PINNING SYMBOL nDIR nOE nAn nBn GND VCC direction control output enable input (active LOW) data inputs/outputs data inputs/outputs ground (0 V) DC supply voltage DESCRIPTION −40 to +85 °C PINS 96 96 PACKAGE LFBGA96 LFBGA96 nDIR L H X nAn A=B inputs Z
74LVC32245A; 74LVCH32245A
OUTPUT nBn inputs B=A Z
MATERIAL plastic plastic
CODE SOT536-1 SOT536-1
1999 Sep 01
3
Philips Semiconductors
Product specification
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state
74LVC32245A; 74LVCH32245A
handbook, full pagewidth
MNA475
6 5 4 3 2 1
1A1 1A0
1A3 1A2
1A5 1A4
1A7 1A6
2A1 2A0
2A3 2A2
2A5 2A4
2A6 2A7
3A1 3A0
3A3 3A2
3A5 3A4
3A7 3A6
4A1 4A0
4A3 4A2
4A5 4A4
4A6 4A7
1OE GND VCC GND GND VCC GND 2OE 3OE GND VCC GND GND VCC GND 4OE 1DIR GND VCC GND GND VCC GND 2DIR 3DIR GND VCC GND GND VCC GND 4DIR 1B0 1B1 A 1B2 1B3 B 1B4 1B5 C 1B6 1B7 D 2B0 2B1 E 2B2 2B4 2B7 3B0 3B1 J 3B2 3B3 K 3B4 3B5 L 3B6 3B7 M 4B0 4B1 N 4B2 4B3 P 4B4 4B5 R 4B7 4B6 T
2B3 2B51 2B6 F G H
Fig.1 Pin configuration.
handbook, halfpage
VCC
data input
to internal circuit
MNA473
Fig.2 Bus hold circuit.
1999 Sep 01
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ook, full pagewidth
1999 Sep 01
A3 1DIR 1OE A5 1A0 1B0 A6 1A1 1B1 B5 1A2 1B2 B6 1A3 1B3 C5 1A4 1B4 C6 1A5 1B5 D5 1A6 1B6 D6 1A7 1B7 D1 D2 H5 2A7 2B7 H2 C1 H6 2A6 2B6 H1 C2 G6 2A5 2B5 G1 B1 G5 2A4 2B4 G2 B2 F6 2A3 2B3 F1 A1 F5 2A2 2B2 F2 A2 E6 2A1 2B1 E1 H3 A4 E5 2A0 2B0 E2 2DIR 2OE H4
Philips Semiconductors
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state
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