74LVC32A

INTEGRATED CIRCUITS 74LVC32A Quad 2-input OR gate Product specification IC24 Data Handbook 1997 Jun 30 Philips Semiconductors Philips Semiconductors Product specification Quad 2-input OR gate 74LVC32A FEATURES Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A. Inputs accept voltages up to 5.5 V CMOS low power consumption Direct interface with TTL levels QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA, nB to nY Input capacitance Power dissipation capacitance per gate DESCRIPTION The 74LVC32A is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC32A provides the 2-input OR function. CONDITIONS CL = 50 pF; VCC = 3.3 V Notes 1 and 2 TYPICAL 2.6 5.0 28 UNIT ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –...