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74LVQ32 Dataheets PDF



Part Number 74LVQ32
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description QUAD 2-INPUT OR GATE
Datasheet 74LVQ32 Datasheet74LVQ32 Datasheet (PDF)

74LVQ32 QUAD 2-INPUT OR GATE s s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLEWITHTTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE W.

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74LVQ32 QUAD 2-INPUT OR GATE s s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLEWITHTTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ32M 74LVQ32T technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 2 stages including buffer output, which enables high noise immunity and stable output. It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The LVQ32 is a low voltage CMOS QUAD 2-INPUT OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS PIN CONNECTION AND IEC LOGIC SYMBOLS February 1999 1/8 74LVQ32 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCT ION Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L L H H B L H L H Y L H H H ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 200 -65 to +150 300 Unit V V V mA mA mA mA o o ICC or IGND DC VCC or Ground Current C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time (VCC = 3V) (note 2) Parameter Supply Voltage (note 1) Valu e 2 to 3.6 0 to VCC 0 to VCC -40 to +85 0 to 10 Unit V V V o C ns/V 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V 2/8 74LVQ32 DC SPECIFICATIONS Symb ol Parameter V CC (V) VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 3.0 to 3.6 3.0 VI = V IH or V IL VI(*) = VIL (* ) Test Co nditions o Valu e T A = 25 C Min. 2.0 0.8 T yp. Max. -40 to 85 C Min. 2.0 0.8 2.9 2.48 2.2 0.002 0 0.1 0.36 ±0.1 2 36 -25 0.1 0.44 0.55 ±1 20 2.99 Max. o Un it V V V I O =-50 µ A IO=-12 mA IO=-24 mA IO=50 µA IO=12 mA IO=24 mA 2.9 2.58 VOL 3.0 V µA µA mA mA II ICC IOLD IOHD 3.6 3.6 3.6 VI = VCC or GND VI = VCC or GND VOLD = 0.8 V max VOHD = 2 V min 1) Maximum test duration 2ms, one output loaded attime 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω. (*) All outputs loaded. DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter V CC (V) VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 3.3 -0.8 3.3 3.3 C L = 50 pF 0.8 Test Co nditions Min. T yp. 0.3 -0.3 2 V Valu e T A = 25 oC Max. 0.8 -40 to 85 o C Min. Max. Un it 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD).,f=1MHz. 3/8 74LVQ32 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns) Symb ol Parameter V CC (V) tPLH tPHL tOSLH tOSHL Propagation Delay Time Output to Output Skew Time (note 1, 2) 2.7 3.3(*) 2.7 3.3 (*) T est Con ditio n o Valu e -40 to 85 C T A = 25 C Min. T yp. Max. Min. Max. 6.0 5.0 0.5 0.5 12.0 9.0 1.0 1.0 14.0 10.0 1.0 1.0 o Un it ns ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tpHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V CAPACITIVE CHARACTERISTICS Symb ol Parameter V CC (V) C IN CPD Input Capacitance Power Dissipation Capacitance (note 1) 3.3 3.3 fIN = 10 MHz Test Co nditions Min. T yp. 4 15 Valu e T A = 25 oC Max. -40 to 85 o C Min. Max. pF pF Un it 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Averag.


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