74LVQ574

® 74LVQ574 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING s s s s s s s s s s s HIGH SPEED: fMAX = 180 MHz (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.5 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 574 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ574M 74LVQ574T On the positive transition of the clock, the Q outputs will be set to logic state that were setup at the D inputs. While the (OE) input is low, the 8 outputs will be in al normal logic state (high or low logic level) and while high level, the outputs will be in a high impedance state. The output control does not affect the internal operation of flip flop, that is, the old data can be retained or the new data can be entered even while the outputs are off. It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumpion. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The LVQ574 is a low voltage CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE OUTPUTS NON INVERTING fabricated ...