74LVT00

INTEGRATED CIRCUITS 74LVT00 3.3V Quad 2-input NAND gate Product specification IC24 Data Handbook 1996 Aug 15 Philips Semiconductors Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An or Bn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3.0V Outputs Low; VCC = 3.6V TYPICAL UNIT tPLH tPHL CIN ICCL 2.7 2.7 3 1 ns pF mA ORDERING INFORMATION PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP 14-Pin Plastic TSSOP TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C OUTSIDE NORTH AMERICA 74LVT00 D 74LVT00 DB 74LVT00 PW NORTH AMERICA 74LVT00 D 74LVT00 DB 74LVT00PW DH DWG NUMBER SOT108-1 SOT337-1 SOT402-1 LOGIC SYMBOL 1 2 4 5 9 10 12 13 PIN CONFIGURATION A0 B0 Y0 A0 B0 A1 B1 A2 B2 A3 B3 A1 B1 Y0 Y1 Y2 Y3 Y1 GND 4 5 6 7 11 10 9 8 Y3 B2 A2 Y2 1 2 3 14 13 12 VCC B3 A3 VCC = Pin 14 GND = Pin 7 3 6 8 11 SA00333 SA00334 PIN DESCRIPTION LOGIC SYMBOL (IEEE/IEC) 1 2 PIN NUMBER 3 SYMBOL An-Bn Yn GND VCC NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage & 1, 2, 4, 5, 9, 10, 12, 13 3, 6, 8, 11 6 4 5 7 14 9 8 10 12 11 13 SF00004 1996 Aug 15 2 853-1858 17183 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 LOGIC DIAGRAM A0 B0 A1 B1 A2 B2 VCC = Pin 14 GND = Pin 7 A3 B3 1 2 4 5 9 10 12 13 11 3 Y0 FUNCTION TABLE INPUTS Dna L L 8 Y2 OUTPUT Dnb L H ...