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74LVT10 Datasheet, Equivalent, NAND gate.3.3V Triple 3-input NAND gate 3.3V Triple 3-input NAND gate |
| Part | 74LVT10 |
|---|---|
| Description | 3.3V Triple 3-input NAND gate |
| Feature | INTEGRATED CIRCUITS
74LVT10 3. 3V Triple 3-input NAND gate Product specification IC24 Data Handbook 1996 May 29 Philips Semiconductors Philips Semiconductors Product specification 3. 3V Triple 3-input NAND gate 74LVT10 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An, Bn, Cn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3. 3V TYPICAL UNIT LOGIC SYMBOL (IEEE/IEC) 1 2 & 12 tPLH tPHL 3. 8 3. 3 13 ns 3 4 6 CIN ICCL VI = 0V or 3. 0V Outputs Low; VCC = 3. 6V 2 1 pF mA 5 9 10 11 8 PIN CONFIGURATION A0 B0 A1 B1 C1 Y1 GND 1 2 3 4 5. |
| Manufacture | NXP |
| Datasheet |
| Part | 74LVT10 |
|---|---|
| Description | 3.3V Triple 3-input NAND gate |
| Feature | INTEGRATED CIRCUITS
74LVT10 3. 3V Triple 3-input NAND gate Product specification IC24 Data Handbook 1996 May 29 Philips Semiconductors Philips Semiconductors Product specification 3. 3V Triple 3-input NAND gate 74LVT10 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An, Bn, Cn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3. 3V TYPICAL UNIT LOGIC SYMBOL (IEEE/IEC) 1 2 & 12 tPLH tPHL 3. 8 3. 3 13 ns 3 4 6 CIN ICCL VI = 0V or 3. 0V Outputs Low; VCC = 3. 6V 2 1 pF mA 5 9 10 11 8 PIN CONFIGURATION A0 B0 A1 B1 C1 Y1 GND 1 2 3 4 5. |
| Manufacture | NXP |
| Datasheet |
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