74LVX00

74LVX00 Low Voltage Quad 2-Input NAND Gate February 1993 Revised March 1999 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Features s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX00M 74LVX00SJ 74LVX00MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Pin Names An , Bn On Description Inputs Outputs © 1999 Fairchild Semiconductor Corporation DS011551.prf www.fairchildsemi.com 74LVX00 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) Power Dissipation ±50 mA −65°C to +150°C 180 mW ±25 mA −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA −0.5V to 7V...