74LVX16245

74LVX16245 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5V TOLERANT INPUTS s s s s s s s s s s HIGH SPEED: tPD = 5.3 ns (TYP.) at VCC = 3V 5V TOLERANT INPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C INPUT VOLTAGE LEVEL: VIL= 0.8, VIH=2V AT VCC=3V POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.3V (TYP.) AT Vcc=3V TSSOP ORDER CODES PACKAGE TSSOP TUBE T&R 74LVX16245TTR PIN CONNECTION DESCRIPTION The 74LVX16245 is an advanced high-speed CMOS 16-BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. This IC is intended for two-way asynchronous communication between data busses; the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the busses are effectively isolated. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW. July 2003 1/10 74LVX16245 INPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOLS PIN DESCRIPTION PIN No 1 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 24 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38, 38 48 4, 10, 15, 21, 28, 34, 3...