74V1G125

® 74V1G125 SINGLE BUS BUFFER (3-STATE) s s s s s s s s HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY S (SOT23-5L) ORDER CODE: 74V1G125S C (SC-70) DESCRIPTION The 74V1G125 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. 3-STATE control input G has to be set high to place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/8 74V1G125 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2 4 3 5 SYMBOL 1G 1A 1Y GND VCC NAME AND FUNCT ION Output Enable Input Data Input Data Output Ground (0V) Positive Supply Voltage TRUTH TABLE A X L H X:”H” or ”L” Z:High Impadance G H L L Y Z L H ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ...