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74VCX164245 Dataheets PDF



Part Number 74VCX164245
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Datasheet 74VCX164245 Datasheet74VCX164245 Datasheet (PDF)

74VCX164245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs March 2000 Revised March 2000 74VCX164245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs General Description The VCX164245 is a dual supply, 16-bit translating transceiver that is designed for 2 way asynchronous communication between busses at different supply voltages by providing true signal translation. The supply rails consist of VCCB, which is the higher potential rail oper.

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74VCX164245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs March 2000 Revised March 2000 74VCX164245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs General Description The VCX164245 is a dual supply, 16-bit translating transceiver that is designed for 2 way asynchronous communication between busses at different supply voltages by providing true signal translation. The supply rails consist of VCCB, which is the higher potential rail operating at 2.3 to 3.6V and VCCA, which is the lower potential rail operating at 1.65 to 2.7V. (VCCA must be less than or equal to VCCB for proper device operation.) This dual supply design allows for translation from 1.8V to 2.5V busses to busses at a higher potential, up to 3.3V. Features s Bidirectional interface between busses ranging from 1.65V to 3.6V s Supports Live Insertion and Withdrawal (Note 1) s Static Drive (IOH/IOL) ±24 mA @ 3.0V VCC ±18 mA @ 2.3V VCC ±6 mA @ 1.65V VCC s Uses patented noise/EMI reduction circuitry s Functionally compatible with 74 series 16245 The Transmit/Receive (T/R) input determines the direction s Latchup performance exceeds 300 mA of data flow. Transmit (active-HIGH) enables data from A Ports to B Ports; Receive (active-LOW) enables data from s ESD performance: B Ports to A Ports.The Output Enable (OE) input, when Human Body Model >2000V HIGH, disables both A and P Ports by placing them in a Machine model >200V High-Z condition. The A Port interfaces with the lower voltage bus (1.8 − 2.5V); The B Port interfaces with the higher voltage bus (2.7 − 3.3V). Also the VCX164245 is designed . so that the control pins (T/Rn, OEn) are supplied by VCCB www.DataSheet4U.com Note 1: To ensure the high impedance state during power The 74VCX164245 is suitable for mixed voltage applications such as notebook computers using a 1.8V CPU and 3.3V peripheral components. It is fabricated with an Advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. up or power down, OEn should be tied to VCCB through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Order Number 74VCX164245MTD Package Number MTD48 Package Description 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Diagram Pin Descriptions Pin Names OEn T/Rn A0–A15 B0–B15 Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs Quiet Series™ is a trademark of Fairchild Semiconductor Corporation. © 2000 Fairchild Semiconductor Corporation DS500159 www.fairchildsemi.com 74VCX164245 Connection Diagram Truth Tables Inputs OE1 L L H Inputs OE2 L L H T/R2 L H X Outputs Bus B8–B15 Data to Bus A8–A15 Bus A8–A15 Data to Bus B8–B15 HIGH-Z State on A8–A15, B8–B15 T/R1 L H X Outputs Bus B0–B7 Data to Bus A0–A7 Bus A0–A7 Data to Bus B0–B7 HIGH Z State on A0–A7, B0–B7 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, inputs may not float) Z = High Impedance Translator Power Up Sequence Recommendations To guard against power up problems, some simple guidelines need to be adhered to. The VCX164245 is designed so that the control pins (T/Rn, OEn) are supplied by VCCB. Therefore the first recommendation is to begin by powering up the control side of the device, VCCB. The OEn control pins should be ramped with or ahead of VCCB, this will guard against bus contentions and oscillations as all A-Port and B Port outputs will be disabled. To ensure the high impedance state during power up or power down, OEn should be tied to VCCB through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Second, the T/Rn control pins should be placed at logic low (0V) level, this will ensure that the B-side bus pins are configured as inputs to help guard against bus contention and oscillations. B-side Data Inputs should be driven to a valid logic level (0V or VCCB), this will prevent excessive current draw and oscillations. VCCA can then be powered up after VCCB, but should never exceed the VCCB voltage level. Upon completion of these steps the device can then be configured for the users desired operation. Following these steps will help to prevent possible damage to the translator device as well as other system components. Logic Diagrams Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74VCX164245 Absolute Maximum Ratings(Note 2) Supply Voltage VCCA VCCB DC Input Voltage (VI) DC Output Voltage (VI/O) Outputs 3-STATE Outputs Active (Note 3) An Bn DC Input Diode Current (IIK) VI < 0V DC Output Diode Current (IOK) VO < 0V VO > VC.


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