MC88PL117

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Not Recommended for New Designs CMOS PLL Clock Driver High Fan-Out The MC88PL117 utilizes proven phase–locked loop clock driver technology to create a large fan–out, multiple frequency and phase, low skew clock driver. The 88PL117 provides the clock frequencies necessary to drive systems using the PowerPC™ 601 microprocessor and the Pentium™ microprocessor (see applications section for details). A total of 14 high current, matched impedance outputs are available in 8 programmable output frequency and phase configurations. Output frequencies are referenced to a system frequency, Q, and are available at 2X, 1X, and 1/2X the Q frequency. Four programmable input frequency multiplication ratios can be programmed to provide outputs at 1X, 2X, and 4X the system frequency Q. Details on the programmable configurations can be found in the applications section of this data sheet. MC88PL117 Programmable Frequency, Low Skew, CMOS PLL CLOCK DRIVER Clock Driver for PowerPC 601 and Pentium Microprocessors 14 programmable outputs Maximum output–to–output skew of 500ps for a single frequency Maximum output–to–output skew of 500ps for multiple frequencies fMAX of 2X_Q = 120MHz One output with programmable phase capability ±36mA DC current outputs drive 50Ω transmission lines FN SUFFIX 52–LEAD PLASTIC LEADLESS CHIP CARRIER (PLCC) CASE 778–02 A lock indicator output (LOCK) goes high when steady–state phase–lock is achieved OE/MR 3–st...