74VHC139

74VHC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER s HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) )s POWER DOWN PROTECTION ON INPUTS t(ss SYMMETRICAL OUTPUT IMPEDANCE: c|IOH| = IOL = 8 mA (MIN) us BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ro )s OPERATING VOLTAGE RANGE: P t(sVCC(OPR) = 2V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH lete uc74 SERIES 139 ds IMPROVED LATCH-UP IMMUNITY bso ProDESCRIPTION The 74VHC139 is an advanced high-speed - O teCMOS DUAL 2 TO 4 LINE DECODER/ ) leDEMULTIPLEXER fabricated with sub-micron t(s osilicon gate and double-layer metal wiring C2MOS stechnology. c bThe active low enable input can be used for gating u Oor as a data input for demultiplexing applications. rod -While the enable input is held high, all four outputs P t(s)are high independently of the other inputs. SOP TSSOP Table 1: Order Codes PACKAGE SOP TSSOP T&R 74VHC139MTR 74VHC139TTR Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. ObsOoblestoelePteroducFigure 1: Pin Connection And IEC Logic Symbols November 2004 Rev. 4 1/12 74VHC139 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° 1, 15 2, 3 ...