Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
LCD Segment Driver
CMOS
The MC141511A is an LCD frontplane (segment) driver chip which includes a 656 x 8 display RAM. The MC68HC05L10 microcomputer is the companion device which provides the backplane drive. The MC68HC05L10, together with one MC141511A, may be used to drive a 5248-pixel muxed-by-41 display or a 4096-pixel muxed-by-32 display. Larger displays may be driven by adding additional MC141511A. The MC141511A is a low operating voltage version of MC141511. It is pin to pin compatible to the MC141511. See Application Note AN-HK-13A. • Operating Supply Voltage Range Control Logic, RAM, and Latch (VDD Pin): 2.7V to 5.5V Frontplane Drivers (VLCD Pin): 4.5V to 13.2V • Operating Temperature Range: -20 to 70˚C • Direct Interface with the MC68HC05L10 • 656 x 8 Static RAM (Display RAM) • 128 LCD Segment (Frontplane) Driving Signals • 10-Bit Address Bus and 8-Bit Bidirectional Data Bus • Selectable 1:32 or 1:41 Multiplex Ratios • Available in Two Forms: TAB (Tape Automated Bonding), 161 Contacts, 10 sprocket hole device Die Form Without Gold Bumps, 159 Pads with 4.5 mil Pads Pitch
MC141511A
MC141511AT2 TAB
MCC141511A DIE
ORDERING INFORMATION
MCC141511A MC141511AT2 BARE DIE TAB
BLOCK DIAGRAM
D0-D7 A0-A9
R/W BPCLK BPSYNC PHI2 CE LRS MS VDD SEGMENT DRIVER LEVEL SELECTOR VLCD VSEGH VSEGL VSS Control Logi c Display RAM
LCD DATA LATCH
DRIVER OUTPUTS
REV 3 10/96
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MC141511A 3–19
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Figure 1A. TAB Package Contact Assignment (Copper View)
MC141511A 3–20
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Figure 1B. Chip Pad Assignment
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MC141511A 3–21
MAXIMUM RATINGS*(Voltages Referenced to VSS, TA = 25˚C) Symbol VDD VLCD Vin I TA Tstg Input Voltage Current Drain Per Pin Excluding VDD and VSS Operating Temperature Storage Temperature Range Supply Voltage Parameter Value -0.3 to +7.0 -0.3 to +14.0 VSS-0.3 to VDD+0.3 25 -20 to +70 -65 to +150 Unit V V V mA ˚C ˚C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Description section. ELECTRICAL CHARACTERISTICS (Voltage Referenced to VSS, TA = 25˚C) Symbol VDD VLCD Operating Voltage Supply Voltage LCD Voltage Supply Current at VDD=5.5V (PHI2=3.685MHz) ACCESS DISPLAY STANDBY (Using DON bit of the MCU) at VDD=3.0V (PHI2=1.25MHz) ACCESS DISPLAY STANDBY (Using DON bit of the MCU) Supply Current at VLCD Output Voltage, Iload10.0uA Output High Voltage (Iload=1.6mA) Output Low Voltage (Iload=1.6mA) Input High Voltage Input Low Voltage Data Retention Input Current Capacitance BPCLK, BPSYNC, R/W, PHI2, D7-D0 R/W, BPCLK, BPSYNC, PHI2, MS, CE, D7-D0 D7-D0 D7-D0 D7-D0 R/W, BPCLK, BPSYNC, PHI2, MS, CE, D7-D0 R/W, BPCLK, BPSYNC, PHI2, MS, CE, D7-D0 Parameter
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions to be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS < or = (Vin or Vout) < or = VDD. Reliability of operation is enhanced if unused input are connected to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. This device may be light sensitive. Caution should be taken to avoid exposure of this device to any light source during normal operation. This device is not radiation protected. Min 2.7 4.5 Typ Max 5.5 13.2 Unit V V
IAC IDP ISB IAC IDP ISB ILCD VOL VOH VOH VOL VIH VIL VR Iin Cin IOH IOL
VLCD-0.1 VDD-0.8 0.8xVDD VSS 2.0 +20 -
25 15 17 10 -
200 30 20 200 30 20 200 0.1 0.4 VDD 0.2xVDD 1 8 -20
uA uA uA uA uA uA uA V V V V V V V uA pF uA uA
Output current (VOH=4.5V, VOL=0.5V)
MC141511A 3–22
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AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE (VDD=3.0V± 10 %, VSS=0V)
Symbol tCYCW tAS tAH tCS tWCS tDSW tH tWH Write Cycle Time Address Set Up Time Address Hold Time Chip Select Pulse Width Write to Chip Select Delay Time Data Setup Time Input Hold Time Write Hold Time from Chip Select Parameter Min 400 100 70 260 100 200 15 70 Max Unit ns ns ns ns ns ns ns ns
tCYCW CE tAS tCS PHI2 tAH
tWCS
t
WH
R/W tDSW tH
D0-7
Data in Stable
Figure 2. Write Cycle Timing
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MC141511A 3–23
AC ELECTRICAL CHARACTERISTICS - READ CYCLE (VDD=3.0V± 10 %, VSS=0V)
Symbol tCYCR tAS tDDR tH READ Cycle Time Address Setup Time Data Delay Time (Read) Output Hold Time Parameter Min 400 100 10 Max 350 Unit ns ns ns ns
tCYCR
CE tAS PHI2 tDDR
tH
D0-7
Data Valid
Figure 3. Read Cycle Timing
MC141511A 3–24
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PIN DESCRIPTIONS
VDD AND VSS The main dc power is supplied to the part by these two connections. VDD is the most-positive supply level for logic circuitry and VSS is ground. VLCD This supply connection provides the voltage level for the s.