MCM6227B

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6227B/D 1M x 1 Bit Static Random Access Memory The MCM6227B is a 1,048,576 bit static random–access memory organized as 1,048,576 words of 1 bit. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability. The MCM6227B is each equipped with a chip enable (E) pin. This feature provides reduced system power requirements without degrading access time performance. The MCM6227B is available in 300 mil and 400 mil, 28–lead surface–mount SOJ packages. Single 5 V ± 10% Power Supply Fast Access Times: 15/17/20/25/35 ns Equal Address and Chip Enable Access Times Input and Output are TTL Compatible Three–State Output Low Power Operation: 115/110/105/100/95 mA Maximum, Active AC MCM6227B J PACKAGE 300 MIL SOJ CASE 810B–03 WJ PACKAGE 400 MIL SOJ CASE 810–03 PIN ASSIGNMENT A A A A A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A A A A A A NC* A A A A D E BLOCK DIAGRAM A A A A A A A A ROW DECODER MEMORY MATRIX 512 ROWS x 2048 x 1 COLUMNS A NC A A A A Q W VSS PIN NAMES A A . . . . . . . . . . . . . . . . . . . . Address Inputs W . . . . . . . . . . . . . . . . . . . . . Write Enable E . . . . . . . . . . . . . . . . . . . . . . Chip Enable D . . . . . . . . . . . . . . . . . . . . . . . . Data Input Q . . . . . . . . . . . . . . . . . . . . . Data Output NC . . . . . . . . . . . ...