IEEE 1284 Transceiver
74VHC161284 IEEE 1284 Transceiver
February 1998 Revised July 2000
74VHC161284 IEEE 1284 Transceiver
General Descriptio...
Description
74VHC161284 IEEE 1284 Transceiver
February 1998 Revised July 2000
74VHC161284 IEEE 1284 Transceiver
General Description
The VHC161284 contains eight bidirectional data buffers and eleven control/status buffers to implement a full IEEE 1284 compliant interface. The device supports the IEEE 1284 standard and is intended to be used in Extended Capabilities Port mode (ECP). The pinout allows for easy connection from the Peripheral (A-side) to the Host (cable side). Outputs on the cable side can be configured to be either open drain or high drive (± 14 mA). The pull-up and pulldown series termination resistance of these outputs on the cable side is optimized to drive an external cable. In addition, all inputs (except HLH) and outputs on the cable side contain internal pull-up resistors connected to the VCC supply to provide proper termination and pull-ups for open drain mode. Outputs on the Peripheral side are standard LOW-drive CMOS outputs. The DIR input controls data flow on the A1–A8/B1–B8 transceiver pins.
Features
s Supports IEEE 1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications between personal computers and printing peripherals s Replaces the function of two (2) 74ACT1284 devices s All inputs have hysteresis to provide noise margin s B and Y output resistance optimized to drive external cable s B and Y outputs in high impedance mode during power down s Inputs and outputs on cable side have internal pull-up resistors s Flow-through pi...
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