MCM69D618

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69D618/D 64K x 18 Bit Synchronous Dual I/O, Dual Address SRAM The MCM69D618 is a 1M–bit static random access memory, organized as 64K words of 18 bits. It features common data input and data output buffers and incorporates input and output registers on–board with high speed SRAM. The MCM69D618 allows the user to concurrently perform reads, writes, or pass–through cycles in combination on the two data ports. The two address ports (AX, AY) determine the read or write locations for their respective data ports (DQX, DQY). The synchronous design allows for precise cycle control with the use of an external single clock (K). All signal pins except output enables (GX, GY) are registered on the rising edge of clock (K). The pass–through feature allows data to be passed from one port to the other, in either direction. The PTX input must be asserted to pass data from port X to port Y. The PTY will likewise pass data from port Y to port X. A pass–through operation takes precedence over a read operation. For the case when AX and AY are the same, certain protocols are followed. If both ports are read, the reads occur normally. If one port is written and the other is read, the read from the array will occur before the data is written. If both ports are written, only the data on DQY will be written to the array. Single 3.3 V ± 5% Power Supply Fast Access Times: 6/8 ns Max Throughput of 1.49 Gigabit...