Single/Dual LVDS Line Receivers
|Total Page||10 Pages|
|Features||Datasheet pdf 19-4802; Rev 0; 7/00 Single/Dual LVDS L ine Receivers with Ultra-Low Pulse Skew in SOT23 General Description The MAX91 11/MAX9113 single/dual low-voltage diff erential signaling (LVDS) receivers are designed for highspeed applications re quiring minimum power consumption, spac e, and noise. Both devices support swit ching rates exceeding 500Mbps while ope rating from a single +3.3V supply, and feature ultra-low 300ps (max) pulse ske w required for high-resolution imaging applications such as laser printers and digital copiers. The MAX9111 is a sing le LVDS receiver, and the MAX9113 is a dual LVDS receiver. Both devices confor m to the EIA/TIA-644 LVDS standard and convert LVDS to LVTTL/CMOS-compatibl.|
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19-1803; Rev 3; 3/09
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
The MAX9111/MAX9113 single/dual low-voltage differen-
tial signaling (LVDS) receivers are designed for high-
speed applications requiring minimum power
consumption, space, and noise. Both devices support
switching rates exceeding 500Mbps while operating from
a single +3.3V supply, and feature ultra-low 300ps (max)
pulse skew required for high-resolution imaging applica-
tions such as laser printers and digital copiers.
The MAX9111 is a single LVDS receiver, and the
MAX9113 is a dual LVDS receiver.
Both devices conform to the EIA/TIA-644 LVDS standard
and convert LVDS to LVTTL/CMOS-compatible outputs.
A fail-safe feature sets the outputs high when the inputs
are undriven and open, terminated, or shorted. The
MAX9111/MAX9113 are available in space-saving 8-pin
SOT23 and SO packages. Refer to the MAX9110/
MAX9112 data sheet for single/dual LVDS line drivers.
o Low 300ps (max) Pulse Skew for High-Resolution
Imaging and High-Speed Interconnect
o Space-Saving 8-Pin SOT23 and SO Packages
o Pin-Compatible Upgrades to DS90LV018A and
DS90LV028A (SO Packages Only)
o Guaranteed 500Mbps Data Rate
o Low 29mW Power Dissipation at 3.3V
o Conform to EIA/TIA-644 Standard
o Single +3.3V Supply
o Flow-Through Pinout Simplifies PCB Layout
o Fail-Safe Circuit Sets Output High for Undriven
o High-Impedance LVDS Inputs when Powered Off
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C 8 SOT23
-40°C to +85°C 8 SO
MAX9113ASA/V+ -40°C to +125°C 8 SO
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Typical Operating Circuit appears at end of data sheet.
Pin Configurations/Functional Diagrams/Truth Table
8 VCC VCC 1
7 OUT GND 2
6 N.C. OUT 3
5 GND N.C. 4
8 IN- IN1- 1
7 IN+ IN1+ 2
6 N.C. IN2+ 3
5 N.C. IN2- 4
8 VCC VCC 1
7 OUT1 GND 2
6 OUT2 OUT1 3
5 GND OUT2 4
(IN_+) - (IN_-)
100Ω PARALLEL TERMINATION (UNDRIVEN)
H = LOGIC LEVEL HIGH
L = LOGIC LEVEL LOW
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