DatasheetsPDF.com

MAX9316A

Maxim

1:5 Differential LVPECL/LVECL/ HSTL Clock and Data Driver

19-2648; Rev 0; 10/02 KIT ATION EVALU E L B AVAILA 1:5 Differential (LV)PECL/(LV)ECL/ HSTL Clock and Data Driver Gener...


Maxim

MAX9316A

File Download Download MAX9316A Datasheet


Description
19-2648; Rev 0; 10/02 KIT ATION EVALU E L B AVAILA 1:5 Differential (LV)PECL/(LV)ECL/ HSTL Clock and Data Driver General Description Features o Guaranteed 400mV Differential Output at 1.5GHz o Selectable Single-Ended or Differential Input o 130ps (max) Part-to-Part Skew at +25°C o 20ps Output-to-Output Skew o 365ps Propagation Delay o Synchronous Output Enable/Disable o On-Chip Reference for Single-Ended Inputs o Input Biased to Low when Open o Pin Compatible with MC100EL14 MAX9316A The MAX9316A is a low-skew, 1-to-5 differential driver designed for clock and data distribution. This device allows selection between two inputs: one differential and one single ended. The selected input is reproduced at five differential outputs. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to one input as a reference voltage. The MAX9316A features low output-to-output skew (20ps), making it ideal for clock and data distribution across a backplane or board. For interfacing to differential HSTL and (LV)PECL signals, this device operates over a 3.0V to 5.5V supply range, allowing high-performance clock or data distribution in systems with a nominal 3.3V or 5.0V supply. For differential (LV)ECL operation, this device operates with a -3.0V to -5.5V supply. The MAX9316A is offered in a 20-pin wide SO package. Applications Precision Clock Distribution Low-Jitter Data Repeaters Data and Clock Drivers and Buffers Central-Office Backplane C...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)