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74VHCT00A

STMicroelectronics

QUAD 2-INPUT NAND GATE

® 74VHCT00A QUAD 2-INPUT NAND GATE PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC =...


STMicroelectronics

74VHCT00A

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Description
® 74VHCT00A QUAD 2-INPUT NAND GATE PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 00 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHCT00AM 74VHCT00AT The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The 74VHCT00A is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS August 1999 1/7 74VHCT00A INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCT ION Data Inputs Data Inputs Data Outputs Ground (0V) Posit...




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