DDR SDRAM (Rev.0.1) Jun,'00 Preliminary
MITSUBISHI LSIs
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
PRELIMINARY
Some of contents are subject to change without notice.
DESCRIPTION
M2S28D20ATP is a 4-bank x 8388608-word x 4-bit, M2S28D30ATP is a 4-bank x 4194304-word x 8-bit, M2S28D40ATP is a 4-bank x 2097152-word x 16-bit, double data rate ...
