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M6MGT166S2BWG Dataheets PDF



Part Number M6MGT166S2BWG
Manufacturers Mitsubishi
Logo Mitsubishi
Description CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-CSP
Datasheet M6MGT166S2BWG DatasheetM6MGT166S2BWG Datasheet (PDF)

MITSUBISHI LSIs M6MGB/T166S2BWG 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY & 2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) DESCRIPTION The MITSUBISHI M6MGB/T166S2BWG is a Stacked Chip Scale Package (S-CSP) that contents 16M-bits flash memory and 2M-bits Static RAM in a 72-pin S-CSP. 16M-bits Flash memory is a 1,048,576 words, 3.3V-only, and high performance non-volatile memory fabricated by CMOS technology for the peripheral circ.

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MITSUBISHI LSIs M6MGB/T166S2BWG 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY & 2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) DESCRIPTION The MITSUBISHI M6MGB/T166S2BWG is a Stacked Chip Scale Package (S-CSP) that contents 16M-bits flash memory and 2M-bits Static RAM in a 72-pin S-CSP. 16M-bits Flash memory is a 1,048,576 words, 3.3V-only, and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and DINOR(DIvided bit-line NOR) architecture for the memory cell. 2M-bits SRAM is a 131,072words unsynchronous SRAM fabricated by silicon-gate CMOS technology. M6MGB/T166S2BWG is suitable for the application of the mobile-communication-system to reduce both the mount space and weight . FEATURES • Access time Flash Memory 90ns (Max.) SRAM 85ns (Max.) • Supply voltage Vcc=2.7 ~ 3.6V • Ambient temperature I version Ta=-40 ~ 85°C • Package : 72-pin S-CSP , 0.8mm ball pitch APPLICATION Mobile communication products PIN CONFIGURATION (TOP VIEW) INDEX (Laser Marking) 1 A NC B NC C DU D A5 E A4 F-A18 S-LB# F-WP# GND F-WE# FRY/BY# 2 3 4 5 6 7 8 NC NC A16 A8 A10 A9 DQ15 NC A11 A15 A14 A13 A12 F-GND F-A17 S-UB# NC F-A19 F-RP# A7 A6 A3 S-OE# DU DU DQ12 SCE2 S-VCC DU NC DQ13 F-VCC S-VCC F-GND GND A0-A16 11.0 mm F A0 G F-CE# DU DQ11 DQ9 DU DQ8 DQ10 :Vcc for Flash :Vcc for SRAM :GND for Flash :Flash/SRAM common GND :Flash/SRAM common Address F-A17-F-A19 :Address for Flash :Flash/SRAM DQ0-DQ15 common Data I/O F-CE# S-CE1# S-CE2 F-OE# S-OE# F-WE# S-WE# F-WP# F-RP# F-RY/BY# S-LB# S-UB# :Flash Chip Enable :SRAM Chip Enable 1 :SRAM Chip Enable 2 :Flash Output Enable :SRAM Output Enable :Flash Write Enable :SRAM Write Enable :Flash Write Protect :Flash Reset Power Down :Flash Ready /Busy :SRAM Lower Byte :SRAM Upper Byte H F-GND A2 I F-OE# DQ6 DQ4 S-WE# A1 SCE1# DQ0 DQ2 DQ1 DQ3 DQ14 J DU K NC L NC F-VCC DQ5 DQ7 DU NC NC 8.0 mm NC:Non Connection DU:Don't Use (Note: Should be open) 1 Nov 1999 , Rev.2.3 MITSUBISHI LSIs M6MGB/T166S2BWG 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY & 2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) BLOCK DIAGRAM 16Mb Flash Memory F-A19 F-A18 F-A17 A16 A15 A14 A13 A12 A11 ADDRESS A10 INPUTS A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 F-CE# F-OE# F-WE# F-WP# F-RP# 128 WORD PAGE BUFFER Main Block 32KW F-VCC 28 Bank(II) F-GND/GND Main Block Parameter Block7 Parameter Block6 Parameter Block5 Parameter Block4 Parameter Block3 Parameter Block2 Parameter Block1 Boot Block X-DECODER Bank(I) 32KW 16KW 16KW 16KW 16KW 16KW 16KW 16KW 16KW Y-DECODER Y-GATE / SENSE AMP. STATUS / ID REGISTER MULTIPLEXER FLASH CHIP ENABLE INPUT FLASH OUTPUT ENABLE INPUT FLASH WRITE ENABLE INPUT FLASH WRITE PROTECT INPUT FLASH RESET/POWER DOWN INPUT CUI WSM INPUT/OUTPUT BUFFERS FLASH READY/BUSY OUTPUT F-RY/BY# DQ15 DQ14DQ13DQ12 DQ3DQ2DQ1DQ0 2Mb SRAM ADDRESS INPUT BUFFER SENSE AMP. A0 A1 DATA INPUTS/OUTPUTS ROW DECODER 131072 WORD x 16 BITS OUTPUT BUFFER DQ 0 DQ 7 SENSE AMP. A15 A16 OUTPUT BUFFER DQ 8 S-CE1# S-CE2 S-LB# S-UB# S-WE# S-OE# DQ15 DATAINPUT BUFFER CLOCK GENERATOR S-VCC DATAINPUT BUFFER GND 2 Nov 1999 , Rev.2.3 MITSUBISHI LSIs M6MGB/T166S2BWG 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY & 2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM Stacked-CSP (Chip Scale Package) 1. Flash Memory DESCRIPTION The Flash Memory of M6MGB/T166S2BWG is 3.3V-only high speed 16,777,216-bit CMOS boot block Flash Memories with alternating BGO (Back Ground Operation) feature. The BGO feature of the device allows Program or Erase operations to be performed in one bank while the device simultaneously allows Read operations to be performed on the other bank. This BGO feature is suitable for mobile and personal computing, and communication products. The Flash Memory of M6MGB/T166S2BWG is fabricated by CMOS technology for the peripheral circuits and DINOR(Divided bit line NOR) architecture for the memory cells. FEATURES Organization .................................1048,576 word x 16bit Boot Block M6MGB166S2BWG ........................ Bottom Boot M6MGT166S2BWG ........................ Top Boot Other Functions Soft Ware Command Control Selective Block Lock Erase Suspend/Resume Program Suspend/Resume Status Register Read Alternating Back Ground Program/Erase Operation Between Bank(I) and Bank(II) Auto Power Down Mode ............................. VCC = 2.7~3.6V Supply voltage ................................ Access time .............................. 90ns (Max.) Power Dissipation ................................. 54 mW (Max. at 5MHz) Read (After Automatic Power Down) .......... 0.33mW (typ.) Program/Erase .................................126 mW (Max.) ................................. 0.33mW (typ.) Standby Deep power down mode ....................... 0.33mW (typ.) Auto program for Bank(I) ...............


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