DatasheetsPDF.com

M74HC373

ST Microelectronics

OCTAL D-TYPE LATCH

M74HC373 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING s HIGH SPEED: tPD = 12ns (TYP.) at VCC = 6V s LOW POWER...


ST Microelectronics

M74HC373

File Download Download M74HC373 Datasheet


Description
M74HC373 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING s HIGH SPEED: tPD = 12ns (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: )VNIH = VNIL = 28 % VCC (MIN.) t(ss SYMMETRICAL OUTPUT IMPEDANCE: c|IOH| = IOL = 6mA (MIN) us BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ros WIDE OPERATING VOLTAGE RANGE: PVCC (OPR) = 2V to 6V tes PIN AND FUNCTION COMPATIBLE WITH le74 SERIES 373 soDESCRIPTION bThe M74HC373 is an high speed CMOS OCTAL OLATCH WITH 3-STATE OUTPUTS fabricated -with sub-micron silicon gate C2MOS technology. t(s)This 8-BIT D-Type latches is controlled by a latch enable input (LE) and output enable input (OE). cWhile the LE input is held at a high level, the Q uoutputs will follow the data input. When the LE is dtaken low, the Q outputs will be latched at the logic rolevel of D input data. DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC373B1R M74HC373M1R T&R M74HC373RM13TR M74HC373TTR While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and when OE is in high level the outputs will be in a high impedance state. The 3-State output configuration and the wide choice of outline make bus organized system simple. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Obsolete PPIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HC373 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)