M74HCT245

M74HCT245 OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTED) s HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245 DESCRIPTION The M74HCT245 is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with silicon gate C2MOS technology. This IC is intended for two-way asynchronous communication between data buses, and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. DIP SOP TSSOP ORDER CODES PACKAGE TUBE T&R DIP SOP TSSOP M74HCT245B1R M74HCT245M1R M74HCT245RM13TR M74HCT245TTR All inputs are equipped with protection circuits against static discharge and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/9 M74HCT245 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 3, 4, 5, 6, 7, 8, 9 18, 17, 16, 15, 14, 13, 12, 11 19 10 20 SYMBOL DIR A1 to A8 NAME AND FUNCTION Directional Control Data Inputs/Outputs B1 to B8 Data Inputs/Outputs G GND VCC Output Enable Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS G L L H X : Don’t Care Z : High Impedance DIR L ...