OCTAL D-TYPE LATCH
M74HCT373
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED:
tPD = 19ns (TYP.) at VCC = 4.5V
s LOW PO...
Description
M74HCT373
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED:
tPD = 19ns (TYP.) at VCC = 4.5V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS :
)VIH = 2V (MIN.) VIL = 0.8V (MAX) t(ss SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 6mA (MIN)
ucs BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ros PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
te PDESCRIPTION leThe M74HCT373 is an high speed CMOS OCTAL oLATCH WITH 3-STATE OUTPUTS fabricated swith sub-micron silicon gate C2MOS technology. bThis 8-BIT D-Type latches is controlled by a latch Oenable input (LE) and output enable input (OE). -While the LE input is held at a high level, the Q t(s)outputs will follow the data input. When the LE is
taken low, the Q outputs will be latched at the logic
clevel of D input data. uWhile the OE input is at low level, the eight outputs dwill be in a normal logic state (high or low logic
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP SOP TSSOP
M74HCT373B1R M74HCT373M1R M74HCT373RM13TR
M74HCT373TTR
level) and when OE is in high level the outputs will be in a high impedance state. The 3-State output configuration and the wide choice of outline make bus organized system simple. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
Obsolete ProPIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
1/11
M74HCT373
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL NAME AND FUNCTIO...
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