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80188 Dataheets PDF



Part Number 80188
Manufacturers Intel Corporation
Logo Intel Corporation
Description HIGH-INTEGRATION 16-BIT MICROPROCESSORS
Datasheet 80188 Datasheet80188 Datasheet (PDF)

www.DataSheet4U.com 80186 80188 HIGH-INTEGRATION 16-BIT MICROPROCESSORS Y Integrated Feature Set Enhanced 8086-2 CPU Clock Generator 2 Independent DMA Channels Programmable Interrupt Controller 3 Programmable 16-bit Timers Programmable Memory and Peripheral Chip-Select Logic Programmable Wait State Generator Local Bus Controller Available in 10 MHz and 8 MHz Versions High-Performance Processor 4 Mbyte Sec Bus Bandwidth Interface 8 MHz (80186) 5 Mbyte Sec Bus Bandwidth Interface 10 MHz (80186) .

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www.DataSheet4U.com 80186 80188 HIGH-INTEGRATION 16-BIT MICROPROCESSORS Y Integrated Feature Set Enhanced 8086-2 CPU Clock Generator 2 Independent DMA Channels Programmable Interrupt Controller 3 Programmable 16-bit Timers Programmable Memory and Peripheral Chip-Select Logic Programmable Wait State Generator Local Bus Controller Available in 10 MHz and 8 MHz Versions High-Performance Processor 4 Mbyte Sec Bus Bandwidth Interface 8 MHz (80186) 5 Mbyte Sec Bus Bandwidth Interface 10 MHz (80186) Y Direct Addressing Capability to 1 Mbyte of Memory and 64 Kbyte I O Completely Object Code Compatible with All Existing 8086 8088 Software 10 New Instruction Types Numerics Coprocessing Capability Through 8087 Interface Available in 68 Pin Plastic Leaded Chip Carrier (PLCC) Ceramic Pin Grid Array (PGA) Ceramic Leadless Chip Carrier (LCC) Available in EXPRESS Standard Temperature with Burn-In Extended Temperature Range ( b 40 C to a 85 C) Y Y Y Y Y Y 272430 – 1 Figure 1 Block Diagram Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata November 1994 COPYRIGHT INTEL CORPORATION 1995 Order Number 272430-002 1 DataSheet 4 U .com www.DataSheet4U.com 80186 80188 High-Integration 16-Bit Microprocessors CONTENTS FUNCTIONAL DESCRIPTION Introduction CLOCK GENERATOR Oscillator Clock Generator READY Synchronization RESET Logic LOCAL BUS CONTROLLER Memory Peripheral Control Local Bus Arbitration Local Bus Controller and Reset PERIPHERAL ARCHITECTURE Chip-Select Ready Generation Logic DMA Channels Timers Interrupt Controller PAGE 9 9 9 9 9 9 9 9 10 10 10 10 10 11 11 12 CONTENTS ABSOLUTE MAXIMUM RATINGS D C CHARACTERISTICS A C CHARACTERISTICS EXPLANATION OF THE AC SYMBOLS WAVEFORMS EXPRESS EXECUTION TIMINGS INSTRUCTION SET SUMMARY FOOTNOTES REVISION HISTORY PAGE 15 15 16 18 19 25 26 27 32 33 2 2 DataSheet 4 U .com www.DataSheet4U.com 80186 80188 Contacts Facing Down Contacts Facing Up 272430 – 2 Figure 2 Ceramic Leadless Chip Carrier (JEDEC Type A) Pins Facing Up Pins Facing Down 272430 – 3 Figure 3 Ceramic Pin Grid Array NOTE Pin names in parentheses apply to the 80188 3 3 DataSheet 4 U .com www.DataSheet4U.com 80186 80188 Leads Facing Up Leads Facing Down 272430 – 4 Figure 4 Plastic Leaded Chip Carrier NOTE Pin names in parentheses apply to the 80188 4 4 DataSheet 4 U .com www.DataSheet4U.com 80186 80188 Table 1 Pin Descriptions Symbol VCC VSS RESET Pin No 9 43 26 60 57 Type I I O Name and Function SYSTEM POWER a 5 volt power supply System Ground Reset Output indicates that the CPU is being reset and can be used as a system reset It is active HIGH synchronized with the processor clock and lasts an integer number of clock periods corresponding to the length of the RES signal Crystal Inputs X1 and X2 provide external connections for a fundamental mode parallel resonant crystal for the internal oscillator Instead of using a crystal an external clock may be applied to X1 while minimizing stray capacitance on X2 The input or oscillator frequency is internally divided by two to generate the clock signal (CLKOUT) Clock Output provides the system with a 50% duty cycle waveform All device pin timings are specified relative to CLKOUT An active RES causes the processor to immediately terminate its present activity clear the internal logic and enter a dormant state This signal may be asynchronous to the processor clock The processor begins fetching instructions approximately 6 clock cycles after RES is returned HIGH For proper initialization VCC must be within specifications and the clock signal must be stable for more than 4 clocks with RES held LOW RES is internally synchronized This input is provided with a Schmitt-trigger to facilitate power-on RES generation via an RC network TEST is examined by the WAIT instruction If the TEST input is HIGH when ‘‘WAIT’’ execution begins instruction execution will suspend TEST will be resampled until it goes LOW at which time execution will resume If interrupts are enabled while the processor is waiting for TEST interrupts will be serviced During power-up active RES is required to configure TEST as an input This pin is synchronized internally Timer Inputs are used either as clock or control signals depending upon the programmed timer mode These inputs are active HIGH (or LOW-to-HIGH transitions are counted) and internally synchronized Timer outputs are used to provide single pulse or continous waveform generation depending upon the timer mode selected DMA Request is asserted HIGH by an external device wh.


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