MATH COPROCESSOR. 80C187 Datasheet

80C187 Datasheet PDF, Equivalent

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Intel Corporation

Total Page 30 Pages
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80C187 Datasheet
Y High Performance 80-Bit Internal
Y Implements ANSI IEEE Standard 754-
1985 for Binary Floating-Point
Y Upward Object-Code Compatible from
Y Fully Compatible with 387DX and 387SX
Math Coprocessors Implements all 387
Architectural Enhancements over 8087
Y Directly Interfaces with 80C186 CPU
Y 80C186 80C187 Provide a Software
Binary Compatible Upgrade from
80186 82188 8087 Systems
Y Expands 80C186’s Data Types to
Include 32- 64- 80-Bit Floating-Point
32- 64-Bit Integers and 18-Digit BCD
Y Directly Extends 80C186’s Instruction
Set to Trigonometric Logarithmic
Exponential and Arithmetic
Instructions for All Data Types
Y Full-Range Transcendental Operations
Y Built-In Exception Handling
Y Eight 80-Bit Numeric Registers Usable
as Individually Addressable General
Registers or as a Register Stack
Y Available in 40-Pin CERDIP and 44-Pin
PLCC Package
(See Packaging Outlines and Dimensions Order 231369)
The Intel 80C187 is a high-performance math coprocessor that extends the architecture of the 80C186 with
floating-point extended integer and BCD data types A computing system that includes the 80C187 fully
conforms to the IEEE Floating-Point Standard The 80C187 adds over seventy mnemonics to the instruction
set of the 80C186 including support for arithmetic logarithmic exponential and trigonometric mathematical
operations The 80C187 is implemented with 1 5 micron high-speed CHMOS III technology and packaged in
both a 40-pin CERDIP and a 44-pin PLCC package The 80C187 is upward object-code compatible from the
8087 math coprocessor and will execute code written for the 80387DX and 80387SX math coprocessors
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
November 1992
Order Number 270640-004

80C187 Datasheet
Figure 1 80C187 Block Diagram

Features Datasheet pdf 80C187 80-BIT MATH COPROCESSOR Y High P erformance 80-Bit Internal Architecture Implements ANSI IEEE Standard 7541985 for Binary Floating-Point Arithmetic Up ward Object-Code Compatible from 8087 F ully Compatible with 387DX and 387SX Ma th Coprocessors Implements all 387 Arch itectural Enhancements over 8087 Direct ly Interfaces with 80C186 CPU 80C186 80 C187 Provide a Software Binary Compatib le Upgrade from 80186 82188 8087 System s Y Y Expands 80C186’s Data Types to Include 32- 64- 80-Bit Floating-Poin t 32- 64-Bit Integers and 18-Digit BCD Operands Directly Extends 80C186’s In struction Set to Trigonometric Logarith mic Exponential and Arithmetic Instruct ions for All Data Types Full-Range Tran scendental Operations for SINE COSINE T ANGENT ARCTANGENT and LOGARITHM Built-I n Exception Handling Eight 80-Bit Numer ic Registers Usable as Individually Add ressable General Registers or as a Regi ster Stack Available in 40-Pin CERDIP a nd 44-Pin PLCC Package (See Packaging Outlines and Dimensions Order.
Keywords 80C187, datasheet, pdf, Intel Corporation, 80-BIT, MATH, COPROCESSOR, 0C187, C187, 187, 80C18, 80C1, 80C, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute

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