Bit Microcontroller. 80C32 Datasheet

80C32 Datasheet PDF, Equivalent


Part Number

80C32

Description

CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller

Manufacture

TEMIC Semiconductors

Total Page 20 Pages
PDF Download
Download 80C32 Datasheet PDF


80C32 Datasheet
MATRA MHS
80C32/80C52
CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller
Description
MHS’s 80C52 and 80C32 are high performance CMOS
versions of the 8052/8032 NMOS single chip 8 bit µC.
The fully static design of the MHS 80C52/80C32 allows
to reduce system power consumption by bringing the
clock frequency down to any value, even DC, without loss
of data.
The 80C52 retains all the features of the 8052 : 8 K bytes
of ROM ; 256 bytes of RAM ; 32 I/O lines ; three 16 bit
timers ; a 6-source, 2-level interrupt structure ; a full
duplex serial port ; and on-chip oscillator and clock
circuits. In addition, the 80C52 has 2 software-selectable
modes of reduced activity for further reduction in power
consumption. In the idle mode the CPU is frozen while
the RAM, the timers, the serial port and the interrupt
system continue to function. In the power down mode the
RAM is saved and all other functions are inoperative.
The 80C32 is identical to the 80C52 except that it has no
on-chip ROM. MHS’s 80C52/80C32 are manufactured
using SCMOS process which allows them to run from 0
up to 44 MHz with Vcc = 5 V.
MHS’s 80C52 and 80C32 are also available at 16 MHz
with 2.7 V < VCC < 5.5 V.
D 80C32 : Romless version of the 80C52
D 80C32/80C52-L16 : Low power version
Vcc : 2.7 – 5.5 V Freq : 0-16 MHz
D 80C32/80C52-12 : 0 to 12 MHz
D 80C32/80C52-16 : 0 to 16 MHz
D 80C32/80C52-20 : 0 to 20 MHz
D 80C32/80C52-25 : 0 to 25 MHz
D 80C32/80C52-30 : 0 to 30 MHz
D 80C32/80C52-36 : 0 to 36 MHz
D 80C32-40 : 0 to 40 MHz*
D 80C32-42 : 0 to 42 MHz*
D 80C32-44 : 0 to 44 MHz*
* 0 to 70°C temperature range.
For other speed and temperature range availability please consult your
sales office.
Features
D Power control modes
D 256 bytes of RAM
D 8 Kbytes of ROM (80C52)
D 32 programmable I/O lines
D Three 16 bit timer/counters
D 64 K program memory space
D 64 K data memory space
D Fully static design
D 0.8µ CMOS process
D Boolean processor
D 6 interrupt sources
D Programmable serial port
D Temperature range : commercial, industrial, automotive,
military
Optional
D Secret ROM : Encryption
D Secret TAG : Identification number
Rev. E (31/08/95)
1

80C32 Datasheet
80C32/80C52
Interface
Figure 1. Block Diagram
MATRA MHS
2 Rev. E (31/08/95)


Features Datasheet pdf MATRA MHS 80C32/80C52 CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller Desc ription MHS’s 80C52 and 80C32 are hig h performance CMOS versions of the 8052 /8032 NMOS single chip 8 bit µC. The f ully static design of the MHS 80C52/80C 32 allows to reduce system power consum ption by bringing the clock frequency d own to any value, even DC, without loss of data. The 80C52 retains all the fea tures of the 8052 : 8 K bytes of ROM ; 256 bytes of RAM ; 32 I/O lines ; three 16 bit timers ; a 6-source, 2-level in terrupt structure ; a full duplex seria l port ; and on-chip oscillator and clo ck circuits. In addition, the 80C52 has 2 software-selectable modes of reduced activity for further reduction in powe r consumption. In the idle mode the CPU is frozen while the RAM, the timers, t he serial port and the interrupt system continue to function. In the power dow n mode the RAM is saved and all other f unctions are inoperative. The 80C32 is identical to the 80C52 except that it has no on-chip ROM. MHS’s 80.
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