AND TIMER. 81C55 Datasheet

81C55 Datasheet PDF, Equivalent


Part Number

81C55

Description

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

Manufacture

OKI electronic componets

Total Page 19 Pages
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Download 81C55 Datasheet


81C55 Datasheet
E2O0014-27-X2
¡ Semiconductor¡ Semiconductor
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Previous version: Aug. 1996
MSM81C55-5RS/GS/JS
2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER
GENERAL DESCRIPTION
The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses
silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum,
while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C55-5
can be used in an MSM80C85AH system without using wait states. The parallel I/O consists
of two 8-bit ports and one 6-bit port (both general purpose).
The MSM81C55-5 also contains a 14-bit programmable counter/timer which may be used for
sequence-wave generation or terminal count-pulsing.
FEATURES
• High speed and low power achieved with silicon gate CMOS technology
• 256 words x 8bits RAM
• Single power supply, 3 to 6 V
• Completely static operation
• On-chip address latch
• 8-bit programmable I/O ports (port A and B)
• TTL Compatible
• RAM data hold characteristic at 2 V
• 6-bit programmable I/O port (port C)
• 14-bit programmable binary counter/timer
• Multiplexed address/data bus
• Direct interface with MSM80C85AH
• 40-pin Plastic DIP (DIP40-P-600-2.54): (Product name: MSM81C55-5RS)
• 44-pin Plastic QFJ (QFJ44-P-S650-1.27): (Product name: MSM81C55-5JS)
• 44-pin Plastic QFP (QFP44-P-910-0.80-2K): (Product name: MSM81C55-5GS-2K)
FUNCTIONAL BLOCK DIAGRAM
IO/M
AD0 - 7
CE
ALE
RD
WR
RESET
256 ¥ 8
Static
RAM
Timer
Port A
A 8 PA0 - 7
Port B
B 8 PB0 - 7
Port C
C 6 PC0 - 5
TIMER IN
TIMER OUT
VCC (+5 V)
GND (0 V)
1/19

81C55 Datasheet
¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
44 pin Plastic QFP
TIMEROUT 1
IO/M 2
CE 3
RD 4
WR 5
ALE 6
AD0 7
AD1 8
AD2 9
AD3 10
NC 11
MSM81C55-5RS/GS/JS
40 pin Plastic DIP
PC3
PC4
TIMER IN
1
2
3
RESET 4
PC5 5
TIMER OUT 6
IO/M 7
CE 8
RD 9
WR 10
ALE 11
AD0 12
AD1 13
AD2 14
AD3 15
AD4 16
AD5 17
AD6 18
AD7 19
GND 20
40 VCC
39 PC2
38 PC1
37 PC0
36 PB7
35 PB6
34 PB5
33 PB4
32 PB3
31 PB2
30 PB1
29 PB0
28 PA7
27 PA6
26 PA5
25 PA4
24 PA3
23 PA2
22 PA1
21 PA0
33 PB6
32 PB5
31 PB4
30 PB3
29 PB2
28 PB1
27 PB0
26 PA7
25 PA6
24 PA5
23 PA4
44 pin Plastic QFJ
TIMER OUT 7
IO/M 8
CE 9
RD 10
WR 11
NC 12
ALE 13
AD0 14
AD1 15
AD2 16
AD3 17
39 PB6
38 PB5
37 PB4
36 PB3
35 PB2
34 NC
33 PB1
32 PB0
31 PA7
30 PA6
29 PA5
2/19


Features Datasheet pdf E2O0014-27-X2 ¡ Semiconductor MSM81C55 -5RS/GS/JS ¡ Semiconductor 2048-Bit CM OS STATIC RAM WITH I/O PORTS AND TIMER This version: Jan. 1998 MSM81C55-5RS/G S/JS Previous version: Aug. 1996 GENER AL DESCRIPTION The MSM81C55-5 has a 2k- bit static RAM (256 bytes) with paralle l I/O ports and a timer. It uses silico n gate CMOS technology and consumes a s tandby current of 100 micro ampere, max imum, while the chip is not selected. F eatureing a maximum access time of 400 ns, the MSM81C55-5 can be used in an MS M80C85AH system without using wait stat es. The parallel I/O consists of two 8- bit ports and one 6-bit port (both gene ral purpose). The MSM81C55-5 also conta ins a 14-bit programmable counter/timer which may be used for sequence-wave ge neration or terminal count-pulsing. FE ATURES • High speed and low power ach ieved with silicon gate CMOS technology • 256 words x 8bits RAM • Single p ower supply, 3 to 6 V • Completely st atic operation • On-chip address latch • 8-bit programmable I/O ports (po.
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