Document
E2B0048-29-21
¡ Semiconductor ML9040-Axx/-Bxx
¡ Semiconductor SEGMENT DRIVER
im in This version: Feb. 1999 ML9040-Axx/-Bxx ar y Previous version: Mar. 1996
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DOT MATRIX LCD CONTROLLER WITH 16-DOT COMMON DRIVER AND 40-DOT
GENERAL DESCRIPTION
The ML9040-Axx/-Bxx is a dot matrix LCD controller which is fabricated in low power CMOS silicon gate technology. Character display on the dot matrix character type LCD can be controlled in combination with a 4-bit or 8-bit microcontroller. This LSI consists of 16-dot COMMON driver, 40-dot SEGMENT driver, display data RAM, character generator RAM, character generator ROM and control circuit. The ML9040-Axx/-Bxx has the character generator ROM that can be programmed by custom mask. The ML9040-Axx/-Bxx is a standard version having 160 characters with lowercase (5 x 7 dots), and 32 characters with uppercase (5 x 10 dots) in this ROM.
FEATURES
• Easy interface with an 8-bit or 4-bit microcontroller. • Dot matrix LCD controller/driver for lowercase (5 x 7 dots) or uppercase (5 x 10 dots). • Automatic power ON reset. • COMMON signal drivers (16) and SEGMENT signal drivers (40). • Can control up to 80 characters when used in combination with MSM5259. • Character generator ROM for 160 characters with lowercase (5 x 7 dots) and 32 characters with uppercase (5 x 10 dots). • Character patterns are programmable by character generator RAM. (Lowercase: 5 x 8 dots, 8 patterns, uppercase: 5 x 11 dots, 4 patterns). • Built-in oscillation circuit to connect with external resistor or ceralock. • 1/8 duty (1 line; 5 x 7 dots + cursor), 1/11 duty (1 line; 5 x 10 dots + cursor), or 1/16 duty (2 lines; 5 x 7 dots + cursor), selectable. • Clear display even at 1/5 bias, 3.0V LCD driving voltage. • LCD driving waveform ML9040-Axx: A mode ML9040-Bxx: B mode • Package options: 80-pin plastic QFP (QFP80-P-1420-0.80-BK) (Product name: ML9040-Axx/-BxxGA) xx indicates code number.
1
2
VDD GND OSC1 OSC2
Timing generation circuit 7 Cursor blink control Instruction decoder (ID) Character generator RAM (CG RAM) 5 16-bit shift register 16 Common signal driver 16 COM1~16 L CP DF
ML9040-Axx/-Bxx
BLOCK DIAGRAM
E RS R/W DB0 - DB3 DB4 - DB7
4 Input/ output buffer
8
Instruction register (IR)
8
7
Parallel/ serial conversion
5 4 8 Data register (DR) 8 8 Character generator ROM (CG RAM) 40
40-bit shift register
40-bit latch
Busy flag (BF)
40 Seg- 40 ment signal SEG1~40 driver
8
V1 V2 V3 V4 V5
Address counter (ADC)
7
Display data RAM (DD RAM)
¡ Semiconductor
DO
¡ Semiconductor
ML9040-Axx/-Bxx
INPUT AND OUTPUT CONFIGURATION
VDD
P N
VDD
VDD
P N
Applicable to pin E.
Applicable to pins R/W and RS.
VDD
VDD
P
VDD
N
VDD
P
P N
Applicable to pins DO, CP, L, and DF.
N
Applicable to pins DB0 - DB7.
3
ML9040-Axx/-Bxx
¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
ML9040-Axx/-Bxx GA
80 77 76 75 74 73 72 71 70 79 78
69
68
67
66
65
SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 GND OSC1
1
2 3 4 5 6 7 8 9
10 11 12 13 14 15
16
17 18 19 20 21 22 23 24
SEG39 SEG40 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 DB7 DB6 DB5 DB4 DB3 DB2
25
39
31
32
33
34
35
36
37
V1 26 V2 27
28
29
OSC2
4
V3 V4 V5 L CP VDD DF DO RS R/W E DB0 DB1
80-Pin Plastic QFP
30
38
40
¡ Semiconductor
ML9040-Axx/-Bxx
PIN DESCRIPTIONS
Symbol R/W RS E DB0 - DB7 OSC1, OSC2 COM1 - COM16 SEG1 - SEG40 DO CP L DF VDD GND V 1 , V 2 , V3 , V 4 , V 5 Read/write selection input pin. "H" : Read, and "L" : Write Register selection input pin. "H" : Data register, and "L" : Instruction register Input pin for data input/output with CPU and for instruction register activation. Input/output pins for data send/receive with CPU Clock oscillating pins required for internal operation upon receipt of the LCD drive signal and CPU instruction. LCD COMMON signal output pins. LCD SEGMENT signal output pins. Output pin to be connected to MSM5259 to expand the number of characters to be displayed. Clock output pin used when DO pin data output shifts inside of MSM5259. Clock output pin for the serially transferred data to be latched to MSM5259. The alternating current signal (Display Frequency) output pin. Power supply pin. Ground pin. Bias voltage input pins to drive the LCD. Description
5
ML9040-Axx/-Bxx
¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage LCD Driving Voltage Symbol VDD V1, V2, V3 V 4 , V5 VI PD TSTG Condition Ta = 25°C Ta = 25°C Rating –0.3 to + 7.0 VDD – 8.0 to VDD + 0.3 –0.3 to VDD + 0.3 500 –55 to + 150 Unit V V Applicable pin VDD, GND V 1 , V 2 , V3 V4, V 5 R/W, RS, E, Input Voltage Power Dissipation Storage Temperature Ta = 25°C — — V mW °C DB0 - DB7 OSC1 — —
RECOMMENDED OPERATING CONDIT.