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MM5451 Dataheets PDF



Part Number MM5451
Manufacturers National
Logo National
Description LED Display Drivers
Datasheet MM5451 DatasheetMM5451 Datasheet (PDF)

MM5450 MM5451 LED Display Drivers February 1995 MM5450 MM5451 LED Display Drivers General Description The MM5450 and MM5451 are monolithic MOS integrated circuits utilizing N-channel metal-gate low threshold enhancement mode and ion-implanted depletion mode devices They are available in 40-pin molded or cavity dual-in-line packages The MM5450 MM5451 is designed to drive common anode-separate cathode LED displays A single pin controls the LED display brightness by setting a reference current th.

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MM5450 MM5451 LED Display Drivers February 1995 MM5450 MM5451 LED Display Drivers General Description The MM5450 and MM5451 are monolithic MOS integrated circuits utilizing N-channel metal-gate low threshold enhancement mode and ion-implanted depletion mode devices They are available in 40-pin molded or cavity dual-in-line packages The MM5450 MM5451 is designed to drive common anode-separate cathode LED displays A single pin controls the LED display brightness by setting a reference current through a variable resistor connected to VDD Features Y Y Y Y Y Y Y Y Y Applications Y Y Y Y Y COPSTM or microprocessor displays Industrial control indicator Relay driver Digital clock thermometer counter voltmeter Instrumentation readouts Continuous brightness control Serial data input No load signal required Enable (on MM5450) Wide power supply operation TTL compatibility 34 or 35 outputs 15 mA sink capability Alphanumeric capability iJA DIP Board e 49 C W Socket e 54 C W Block Diagram TL F 6136–1 FIGURE 1 COPSTM is a trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 6136 RRD-B30M105 Printed in U S A Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications VSS b 0 3V to VSS a 12V b 25 C to a 85 C Operating Temperature b 65 C to a 150 C Storage Temperature a 150 C Junction Temperature Lead Temperature (Soldering 10 sec ) 300 C Voltage at Any Pin Power Dissipation at a 25 C Molded DIP Package Board Mount Molded DIP Package Socket Mount 2 5W 2 3W Molded DIP Package board mount iJA e 49 C W Derate 20 4 mW C above 25 C Molded DIP Package socket mount iJA e 54 C W Derate 18 5 mW C above 25 C Electrical Characteristics Parameter Power Supply Power Supply Current Input Voltages Logical ‘‘0’’ Level (VL) Logical ‘‘1’’ Level (VH) Brightness Input (Note 2) Output Sink Current Segment OFF Segment ON TA within operating range VDD e 4 75V to 11 0V VSS e 0V unless otherwise specified Conditions Min 4 75 Typ Max 11 7 b0 3 Units V mA V V V mA mA mA mA mA V % kHz ns ns ns ns ns Excluding Output Loads g 10 mA Input Bias 4 75V s VDD s 5 25V VDD l 5 25V VDD b 2V 0 22 08 VDD VDD 0 75 10 VOUT e 3 0V VOUT e 1V (Note 3) Brightness Input e 0 mA Brightness Input e 100 mA Brightness Input e 750 mA Input Current 750 mA (Notes 5 and 6) 0 20 15 30 27 10 4 25 43 g 20 Brightness Input Voltage (Pin 19) Output Matching (Note 1) Clock Input Frequency fC High Time th Low Time tl Data Input Set-Up Time tDS Hold Time tDH Data Enable Input Set-Up Time tDES 500 950 950 300 300 100 Note 1 Output matching is calculated as the percent variation (IMAX a IMIN) 2 Note 2 With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another Maximum brightness input current can be 2 mA as long as Note 3 and junction temperature equation are complied with Note 3 See Figures 5 6 and 7 for Recommended Operating Conditions and limits Absolute maximum for each output should be limited to 40 mA Note 4 The VOUT voltage should be regulated by the user See Figures 6 and 7 for allowable VOUT vs IOUT operation Note 5 AC input waveform specification for test purpose tr s 20 ns tf s 20 ns f e 500 kHz 50% g 10% duty cycle Note 6 Clock input rise and fall times must not exceed 300 ns Connection Diagrams Dual-In-Line Package Dual-In-Line Package TL F 6136–2 TL F 6136–3 Top View Top View FIGURE 2b FIGURE 2a Order Number MM5450N MM5451N MM5450V or MM5451V See NS Package Number N40A or V44A 2 Connection Diagrams (Continued) Plastic Chip Carrier TL F 6136–13 Top View Plastic Chip Carrier TL F 6136–14 Top View 3 Functional Description Both the MM5450 and the MM5451 are specifically designed to operate 4- or 5-digit alphanumeric displays with minimal interface with the display and the data source Serial data transfer from the data source to the display driver is accomplished with 2 signals serial data and clock Using a format of a leading ‘‘1’’ followed by the 35 data bits allows data transfer without an additional load signal The 35 data bits are latched after the 36th bit is complete thus providing non-multiplexed direct drive to the display Outputs change only if the serial data bits differ from the previous time Display brightness is determined by control of the output current for LED displays A 0 001 capacitor should be connected to brightness control pin 19 to prevent possible oscillations A block diagram is shown in Figure 1 For the MM5450 a DATA ENABLE is used instead of the 35th output The DATA ENABLE input is a metal option for the MM5450 The output current is typically 20 times greater than the current into pin 19 which is set by an external variable resistor There is an internal limiting resistor of 400X nominal value There must be a complete set of 36 clocks or the shift registers will not clear When the chip first powers ON an.


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