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NJU3555 Dataheets PDF



Part Number NJU3555
Manufacturers New Japan Radio
Logo New Japan Radio
Description 4-BIT SINGLE CHIP OTP MICRO CONTROLLER
Datasheet NJU3555 DatasheetNJU3555 Datasheet (PDF)

NJU3555 PRELIMINARY 4-BIT SINGLE CHIP OTP MICRO CONTROLLER s GENERAL DESCRIPTION The NJU3555 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory. It is completely compatible with the NJU3505 in function and the pin configuration. Therefore, the NJU3555 is suitable for the final evaluation before NJU3505 mask generation, the small quantity production and short leadtime. * In this data sheet, only OTP programming and the difference between NJU3555 and NJU3505 a.

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NJU3555 PRELIMINARY 4-BIT SINGLE CHIP OTP MICRO CONTROLLER s GENERAL DESCRIPTION The NJU3555 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory. It is completely compatible with the NJU3505 in function and the pin configuration. Therefore, the NJU3555 is suitable for the final evaluation before NJU3505 mask generation, the small quantity production and short leadtime. * In this data sheet, only OTP programming and the difference between NJU3555 and NJU3505 are mentioned mainly. Therefore the detail function and specification should be referred on the NJU3505 data sheet. NJU3555FA1 NJU3555L s PACKAGE OUTLINE s FEATURES q q q q q 8,192 X 8bits 8,128 X 8bits (Program area) 64 X 8bits (Option area) Internal Data RAM 256 X 4bits Wide operating voltage range 2.7V ~ 5.5V Package outline QFP44-A1 / SDIP42 (Compatible with NJU3505) ROM programmer “SUPERPRO/L” by XELTEK co,. Internal One Time Programmable ROM s PIN CONFIGURATION IN OTP PROGRAMMING MODE [ QFP44-A1 ] CNT2 Open CNT1 Open D7 D6 [ SDIP42 ] CNT1 CNT2 VDD Open D5 D4 D3 D2 Open D1 D0 Open Open RESET PROM CLK REQ VSS VSS Open 1 2 Open 3 4 5 6 RESET PROM CLK REQ VSS 7 8 9 10 12 13 14 15 16 17 18 19 20 21 11 33 32 31 30 29 28 27 26 25 24 22 23 NJU3555FA1 Open VDD Open VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 Open D7 D6 VDD Open D5 D4 D3 D2 Open D1 D0 44 43 42 41 40 39 38 37 36 35 34 NJU3555L Open Note) The pin configuration in Normal operating mode is the same as NJU3505. VSS -1- NJU3555 s BLOCK DIAGRAM -2NJU3555 Interrupt CPU CORE Logic VDD VSS INT1 EXTI/PK0 INT2 TIMER1 STACK X Reg Y Reg AC TEST RESET INT3 CNTI/PK1 TIMER2 X’ Reg MUX Y’ Reg TLU addr PC INT4 SDO/PL0 PRESCALER SDI(O)/PL1 SIO OTP ROM ALU 8192 x 8 bits OSC1 SCK/CKOUT AIN0/PI0 CPU TIMING GENERATOR OSC OSC2 AIN1/PI1 AIN2/PI2 AIN3/PI3 IR RAM 256 x 4 bits ID STANDBY CONTROLLER AIN4/PA0 A/D AIN5/PA1 AIN6/PA2 AIN7/PA3 VREF/PJ0 ADCK/PJ1 PORT_B PORT_C PORT_D PORT_E PORT_F PORT_G PORT_H PF0 PF1 PF2 PB0 PB1 PB2 PB3 PE0 PE1 PE2 PE3 PC0 PC1 PD0 PD1 PD2 PD3 PH0 PH1 PG0 PG1 AVSS AVDD * Refer [INPUT OUTPUT TERMINAL TYPE] NJU3555 s TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE No. NJU NJU 3555F 3555L 7 10 SYMBOL RESET D0 - D7 CNT1 CNT2 REQ CLK PROM VDD VSS INPUT / OUTPUT INPUT FUNCTION RESET terminal. When the low-level input-signal, the system is initialized. 25, 26, 28, 29, 28-31, 31-34, 34, 35 37, 38 1 40, 2 41 10 13 9 12 8 11 18, 33 21, 36 11, 12 14, 15 Note 1) 2) INPUT/OUTPUT Data bus INPUT INPUT OUTPUT INPUT INPUT OTP control input terminal Request output terminal Clock input terminal OTP programming enable terminal Power Source (5V) Power Source (0V) Use at VDD=5V in OTP programming mode. Non connect anything to the other terminals. -3- NJU3555 s Difference between NJU3555 (OTP version) and NJU3505 (MASK version) q Operating mode NJU3555 has two operating modes. One is ”Normal operating mode” and the other is “OTP programming mode”. • Normal operating mode The ”TEST” terminal is set to low level. (The terminal is recommended to connect to GND.) Operating voltage range; 2.7V ~ 5.5V. OTP Programming mode User program is read out from or written into the OTP by the universal programmer “SUPERPRO/L” and converting adapter made by XELTEK co,.(USA). • q Programming memory (OTP) The address location of programming memory (OTP) of NJU3555 is compatible with the masked ROM of NJU3505, excepting the option area. The option area is located in page 127(64bytes) in the following. Program Area Option Area : Addresses 0000H ~ 1FBFH : 8,128bytes : Addresses 1FC0H ~ 1FFFH : 64bytes [ PROGRAM MEMORY AREA ] (Addresses) 0000H Program Start Address (Addresses in the bank) 0000H 0040H (Addresses in the page) 00H Page 0 Page 1 Page 2 Bank 0 07FFH 0800H 0080H 64 Instruction Words 3FH Bank 1 0FFFH 1000H 0780H Bank 2 17FFH 1800H 07C0H 07FFH Page 30 Page 31 Bank 0 ∗ 8 Bits / Instruction Word 64 Instruction Words /Page 32 Pages / Bank 4 Banks / OTP * In case of NJU3505, Page127 is program area. Bank 3 1FFFH 1FC0H 1FFFH Option area Page 127 -4- NJU3555 q Reset Terminal Type Internal Pull-up Resistance NJU3555 With Pull-up NJU3505 Without Pull-up q Option information set in the initialization When the initialization is performed(RESET terminal is “L”), the operation information stored in option area is set as shown in the following timing chart . The option information is set in the term of 1 / fOSC x 512clock after RESET releasing and oscillation stability time. After information set, the program counter is set to 0000H and the NJU3555 operates in normal. [ TIMING CHART ] Oscillation Stability Time Oscillator Clock Option information setting 1/fOSCx512clock Normal Operation Oscillation Start PC=0000H RESET fOSC=4MHz about 128µsec -5- NJU3555 s ABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER .


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