MM74C157

MM74C157 Quad 2-Input Multiplexers October 1987 Revised January 1999 MM74C157 Quad 2-Input Multiplexers General Description The MM74C157 multiplexers are monolithic complementary MOS (CMOS) integrated circuits constructed with Nand P-channel enhancement transistors. They consist of four 2-input multiplexers with common select and enable inputs. When the enable input is at logical “0” the four outputs assume the values as selected from the inputs. When the enable input is at logical “1”, the outputs assume logical “0”. Select decoding is done internally resulting in a single select input only. Features s Supply voltage range: s High noise immunity: 3V to 15V 0.45 VCC (typ.) Drive 2 LPTTL loads s Low power: 50 nW (typ.) s Tenth power TTL compatible: Ordering Code: Order Number MM74C157N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Connection Diagram Pin Assignments for DIP Logic Diagram Top View Truth Table Enable 1 0 0 0 0 Select X 0 0 1 1 A X 0 1 X X B X X X 0 1 Output Y 0 0 1 0 1 © 1999 Fairchild Semiconductor Corporation DS005894.prf www.fairchildsemi.com MM74C157 Absolute Maximum Ratings(Note 1) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Maximum VCC Voltage Power Dissipation (PD) Dual-In-Line Small Outline 700 mW 500 mW −0.3V to VCC + 0.3V −40°C to +85°C −65°C to +150°C 18V Operating VCC Range Lead Temperature (Soldering, 10 seconds) 3V to 15V 260°C Note 1: “Abs...