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MM74C174

National

Hex D Flip-Flop

MM54C174 MM74C174 Hex D Flip-Flop February 1988 MM54C174 MM74C174 Hex D Flip-Flop General Description The MM54C174 MM7...


National

MM74C174

File Download Download MM74C174 Datasheet


Description
MM54C174 MM74C174 Hex D Flip-Flop February 1988 MM54C174 MM74C174 Hex D Flip-Flop General Description The MM54C174 MM74C174 hex D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors All have a direct clear input Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse Clear is independent of clock and accomplished by a low level at the clear input All inputs are protected by diodes to VCC and GND Features Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility 3 0V to 15V 1 0V 0 45 VCC (typ ) Fan out of 2 driving 74L Logic and Connection Diagrams TL F 5899 – 2 TL F 5899 – 1 TL F 5899 – 3 Dual-In-Line Package Truth Table Inputs Clear L H H H Clock X D X H L X Output Q L H L Q u u L TL F 5899 – 4 Top View Order Number MM54C174 or MM74C174 C1995 National Semiconductor Corporation TL F 5899 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range MM54C174 MM74C174 b 0 3V to VCC a 0 3V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperatu...




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