MM74C20 NAND Gate Datasheet

MM74C20 Datasheet, PDF, Equivalent


Part Number

MM74C20

Description

Quad 2-Input NAND Gate / Quad 2-Input NOR Gate / Hex Inverter / Triple 3-Input NAND Gate / Dual 4-Input NAND Gate

Manufacture

National

Total Page 6 Pages
Datasheet
Download MM74C20 Datasheet


MM74C20
February 1988
MM54C00 MM74C00 Quad 2-Input NAND Gate
MM54C02 MM74C02 Quad 2-Input NOR Gate
MM54C04 MM74C04 Hex Inverter
MM54C10 MM74C10 Triple 3-Input NAND Gate
MM54C20 MM74C20 Dual 4-Input NAND Gate
General Description
These logic gates employ complementary MOS (CMOS) to
achieve wide power supply operating range low power con-
sumption high noise immunity and symmetric controlled
rise and fall times With features such as this the 54C 74C
logic family is close to ideal for use in digital systems Func-
tion and pin out compatibility with series 54 74 devices mini-
mizes design time for those designers already familiar with
the standard 54 74 logic family
All inputs are protected from damage due to static dis-
charge by diode clamps to VCC and GND
Features
Y Wide supply voltage range
Y Guaranteed noise margin
Y High noise immunity
Y Low power consumption
Y Low power
TTL compatibility
3V to 15V
1V
0 45 VCC (typ )
10 nW package (typ )
Fan out of 2
driving 74L
Connection Diagrams
Dual-In-Line Packages
MM54C00 MM74C00
MM54C02 MM74C02
MM54C04 MM74C04
Top View
TL F 5877–1
Order Number MM54C00 or
MM74C00
MM54C10 MM74C10
Top View
TL F 5877 – 2
Order Number MM54C02 or
MM74C02
Top View
TL F 5877 – 3
Order Number MM54C04
or MM74C04
MM54C20 MM74C20
Top View
Order Number MM54C10 or
MM74C10
TL F 5877 – 4
Top View
Order Number MM54C20 or
MM74C20
TL F 5877 – 5
C1995 National Semiconductor Corporation TL F 5877
RRD-B30M115 Printed in U S A

MM74C20
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage at Any Pin
Operating Temperature Range
54C
74C
b0 3V to VCC a 0 3V
b55 C to a125 C
b40 C to a85 C
Storage Temperature Range
b65 C to a150 C
Operating VCC Range
Maximum VCC Voltage
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature
(Soldering 10 seconds)
DC Electrical Characteristics
Min Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min Typ
CMOS TO CMOS
VIN(1)
VIN(0)
VOUT(1)
VOUT(0)
IIN(1)
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
Logical ‘‘1’’ Input Current
VCC e 5 0V
VCC e 10V
VCC e 5 0V
VCC e 10V
VCC e 5 0V IO e b10 mA
VCC e 10V IO e b10 mA
VCC e 5 0V IO e 10 mA
VCC e 10V IO e 10 mA
VCC e 15V VIN e 15V
35
80
45
90
0 005
IIN(0)
Logical ‘‘0’’ Input Current
VCC e 15V VIN e 0V
b1 0
b0 005
ICC Supply Current
LOW POWER TO CMOS
VCC e 15V
0 01
VIN(1)
Logical ‘‘1’’ Input Voltage
VIN(0)
Logical ‘‘0’’ Input Voltage
VOUT(1) Logical ‘‘1’’ Output Voltage
VOUT(0) Logical ‘‘0’’ Output Voltage
CMOS TO LOW POWER
54C VCC e 4 5V
74C VCC e 4 75V
54C VCC e 4 5V
74C VCC e 4 75V
54C VCC e 4 5V IO e b10 mA
74C VCC e 4 75V IO e b10 mA
54C VCC e 4 5V IO e 10 mA
74C VCC e 4 75V IO e 10 mA
VCC b 1 5
VCC b 1 5
44
44
VIN(1)
Logical ‘‘1’’ Input Voltage
54C VCC e 4 5V
40
74C VCC e 4 75V
40
VIN(0)
Logical ‘‘0’’ Input Voltage
54C VCC e 4 5V
74C VCC e 4 75V
VOUT(1) Logical ‘‘1’’ Output Voltage 54C VCC e 4 5V IO e b360 mA
24
74C VCC e 4 75V IO e b360 mA
24
VOUT(0) Logical ‘‘0’’ Output Voltage 54C VCC e 4 5V IO e 360 mA
74C VCC e 4 75V IO e 360 mA
OUTPUT DRIVE (see 54C 74C Family Characteristics Data Sheet) TA e 25 C (short circuit current)
ISOURCE Output Source Current
VCC e 5 0V VIN(0) e 0V VOUT e 0V
b1 75
ISOURCE Output Source Current
VCC e 10V VIN(0) e 0V VOUT e 0V
b8 0
ISINK
Output Sink Current
VCC e 5 0V VIN(1) e 5 0V VOUT e VCC
1 75
ISINK
Output Sink Current
VCC e 10V VIN(1) e 10V VOUT e VCC
80
3 0V to 15V
18V
700 mW
500 mW
300 C
Max Units
V
V
15 V
20 V
V
V
05 V
10 V
1 0 mA
mA
15 mA
V
V
08 V
08 V
V
V
04 V
04 V
V
V
10 V
10 V
V
V
04 V
04 V
mA
mA
mA
mA
2


Features MM54C00 MM74C00 MM54C02 MM74C02 MM54C04 MM74C04 MM54C10 MM74C10 MM54C20 MM74C20 February 1988 MM54C00 MM54C02 MM54C0 4 MM54C10 MM54C20 MM74C00 Quad 2-Input NAND Gate MM74C02 Quad 2-Input NOR Gat e MM74C04 Hex Inverter MM74C10 Triple 3 -Input NAND Gate MM74C20 Dual 4-Input N AND Gate Features Y Y Y Y Y General De scription These logic gates employ comp lementary MOS (CMOS) to achieve wide po wer supply operating range low power co nsumption high noise immunity and symme tric controlled rise and fall times Wit h features such as this the 54C 74C log ic family is close to ideal for use in digital systems Function and pin out co mpatibility with series 54 74 devices m inimizes design time for those designer s already familiar with the standard 54 74 logic family All inputs are protect ed from damage due to static discharge by diode clamps to VCC and GND Wide su pply voltage range Guaranteed noise mar gin High noise immunity Low power consu mption Low power TTL compatibility 3V to 15V 1V 0 45 VCC (typ .
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