MM74C374 D-Type Flip-Flop Datasheet

MM74C374 Datasheet, PDF, Equivalent


Part Number

MM74C374

Description

Octal D-Type Latch Octal D-Type Flip-Flop

Manufacture

National

Total Page 8 Pages
Datasheet
Download MM74C374 Datasheet


MM74C374
March 1988
MM54C373 MM74C373 TRI-STATE Octal D-Type Latch
MM54C374 MM74C374 TRI-STATE Octal D-Type Flip-Flop
General Description
The MM54C373 MM74C373 MM54C374 MM74C374 are
integrated complementary MOS (CMOS) 8-bit storage ele-
ments with TRI-STATE outputs These outputs have been
specially designed to drive high capacitive loads such as
one might find when driving a bus and to have a fan out of 1
when driving standard TTL When a high logic level is ap-
plied to the OUTPUT DISABLE input all outputs go to a high
impedance state regardless of what signals are present at
the other inputs and the state of the storage elements
The MM54C373 MM74C373 is an 8-bit latch When LATCH
ENABLE is high the Q outputs will follow the D inputs
When LATCH ENABLE goes low data at the D inputs
which meets the set-up and hold time requirements will be
retained at the outputs until LATCH ENABLE returns high
again
The MM54C374 MM74C374 is an 8-bit D-type positive-
edge triggered flip-flop Data at the D inputs meeting the
set-up and hold time requirements is transferred to the Q
outputs on positive-going transitions of the CLOCK input
Both the MM54C373 MM74C373 and the MM54C374
MM74C374 are being assembled in 20-pin dual-in-line pack-
ages with 0 300 pin centers
Features
Y Wide supply voltage range
3V to 15V
Y High noise immunity
Y Low power consumption
0 45 VCC (typ )
Y TTL compatibility
Fan out of 1
driving standard TTL
Y Bus driving capability
Y TRI-STATE outputs
Y Eight storage elements in one package
Y Single CLOCK LATCH ENABLE and OUTPUT
DISABLE control inputs
Y 20-pin dual-in-line package with 0 300 centers takes
half the board space of a 24-pin package
Connection Diagrams
MM54C373 MM74C373
Dual-In-Line Package
MM54C374 MM74C374
Dual-In-Line Package
Top View
TL F 5906 – 1
Order Number MM54C373 or MM74C373
Top View
TL F 5906 – 2
Order Number MM54C374 or MM74C374
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5906
RRD-B30M105 Printed in U S A

MM74C374
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage at Any Pin
Operating Temperature Range (TA)
MM54C373
MM74C373
b0 3V to VCC a 0 3V
b55 C to a125 C
b40 C to a85 C
Storage Temperature Range (TS)
b65 C to a150 C
Power Dissipation
Dual-In-Line
Small Outline
Operating VCC Range
Absolute Maximum VCC
Lead Temperature (TL)
(Soldering 10 seconds)
700 mW
500 mW
3V to 15V
18V
260 C
DC Electrical Characteristics Min Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min Typ Max Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VIN(0)
Logical ‘‘0’’ Input Voltage
VOUT(1) Logical ‘‘1’’ Output Voltage
VOUT(0) Logical ‘‘0’’ Output Voltage
IIN(1)
IIN(0)
IOZ
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
TRI-STATE Leakage Current
ICC Supply Current
CMOS LPTTL INTERFACE
VCC e 5V
VCC e 10V
VCC e 5V
VCC e 10V
VCC e 5V IO e b10 mA
VCC e 10V IO e b10 mA
VCC e 5V IO e 10 mA
VCC e 10V IO e 10 mA
VCC e 15V VIN e 15V
VCC e 15V VIN e 0V
VCC e 15V VO e 15V
VCC e 15V VO e 0V
VCC e 15V
35
80
45
90
b1 0
b1 0
15
20
0 005
b0 005
0 005
b0 005
0 05
05
10
10
10
300
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
VIN(1)
Logical ‘‘1’’ Input Voltage
VIN(0)
Logical ‘‘0’’ Input Voltage
VOUT(1) Logical ‘‘1’’ Output Voltage
VOUT(0) Logical ‘‘0’’ Output Voltage
OUTPUT DRIVE (Short Circuit Current)
54C VCC e 4 5V
74C VCC e 4 75V
VCC b 1 5
VCC b 1 5
54C VCC e 4 5V
54C VCC e 4 75V
54C VCC e 4 5V IO e b360 mA
VCC b 0 4
74C VCC e 4 75V IO e b360 mA VCC b 0 4
54C VCC e 4 5V IO e b1 6 mA
74C VCC e 4 75V IO e b1 6 mA
24
24
54C VCC e 4 5V IO e 1 6 mA
74C VCC e 4 75V IO e 1 6 mA
V
V
08 V
08 V
V
V
V
V
04 V
04 V
ISOURCE Output Source Current
VCC e 5V VOUT e 0V
TA e 25 C (Note 4)
b12
b24
mA
ISOURCE Output Source Current
VCC e 10V VOUT e 0V
TA e 25 C (Note 4)
b24
b48
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 5V VOUT e VCC
TA e 25 C (Note 4)
6 12
mA
ISINK
Output Sink Current
(N-Channel)
VCC e 10V VOUT e VCC
TA e 25 C (Note 4)
24 48
mA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
2


Features MM54C373 MM74C373 TRI-STATE Octal D-Type Latch MM54C374 MM74C374 TRI-STATE Octa l D-Type Flip-Flop March 1988 MM54C37 3 MM74C373 TRI-STATE Octal D-Type Latch MM54C374 MM74C374 TRI-STATE Octal D-Ty pe Flip-Flop General Description The MM 54C373 MM74C373 MM54C374 MM74C374 are i ntegrated complementary MOS (CMOS) 8-bi t storage elements with TRI-STATE outpu ts These outputs have been specially de signed to drive high capacitive loads s uch as one might find when driving a bu s and to have a fan out of 1 when drivi ng standard TTL When a high logic level is applied to the OUTPUT DISABLE input all outputs go to a high impedance sta te regardless of what signals are prese nt at the other inputs and the state of the storage elements The MM54C373 MM74 C373 is an 8-bit latch When LATCH ENABL E is high the Q outputs will follow the D inputs When LATCH ENABLE goes low da ta at the D inputs which meets the set- up and hold time requirements will be r etained at the outputs until LATCH ENABLE returns high again Th.
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